Performing Thermal Analysis in System

May 1, 2006 12:00 PM
By Tom Ivins, Applications Engineer, Semtech, Camarillo, Calif.

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Integrated circuit (IC) manufacturers normally publish a thermal resistance rating (è_JA; thermal resistance from die junction-to-ambient air) on their data sheets. This information is useful for estimating a device's operating temperature. The è_JA rating is usually based on an industry-standard method using a standardized layout and test procedure. In practice, the actual è_JA may be much different than the rated value when used in a layout that is suitable for the application but is not optimal for heat dissipation.

A simple test described here may be performed to verify the actual in-system thermal performance to ensure a reasonable operating temperature. With this method, the junction temperature (T_J) of an IC may be measured in the application, provided the device includes an overtemperature (OT) protection circuit.

One of the biggest concerns in portable power management designs is heat dissipation. Because of the limited air flow and printed circuit board surface area in a portable application, components such as linear battery chargers, low dropout regulators, charge pumps and dc-dc converters can reach excessive junction temperatures. Thermally efficient package types such as the micro leadframe package (MLP) and leadless leadframe package (LLP) are now used with the aim of keeping the IC's operating temperature within acceptable levels. The best weapon these packages have for thermal management is a thermal-die attach pad in the center of the device.

Many miniature MLP devices have è_JA ratings as low as 30°C/W specified in their data sheets. In practice, however, è_JA can be much higher than the manufacturer specification due to various system design limitations. To avoid putting false hope in data sheet thermal specifications, an in-circuit thermal analysis should be performed to verify that the actual è_JA is low enough to support the application. This simple test can be the difference between a robust system design and one that temperature cycles or self-destructs due to poor thermal management.

Step one: To determine the true thermal resistance of your IC in its application, start by identifying the maximum T_J of the device allowed by the OT protection circuit. Typically, this is around 150°C. It is a good idea to measure the OT activation temperature in a temperature chamber with the device in a minimum power state under no-load conditions. Increase the temperature until the device protection is triggered. At this point, T_J = ambient temperature (T_A) since power dissipation (P_D) is negligible. Record the result as T_J.

Step two: Find the application circuit's maximum power dissipation. First, force the ambient air to a high temperature to make it easier to reach OT through self-heating when a load is applied to the IC. Set T_A somewhat higher than the maximum system application ambient. Usually T_{A MAX} = 85°C, so try 100°C and record this value as T_A. Set P_D for the device and increase P_D very slowly until the OT circuit activates. An OT circuit with hysteresis will temperature cycle very slowly when the P_D is slightly over maximum. Slowly reduce the P_D until the temperature cycling stops. Record this as the maximum P_D for the application.

Step three: Calculate thermal resistance using the following equation:

è_JA = (T_J - T_A) / P_D.

A good layout should result in a value close to the data sheet specification for è_JA.

Use the resulting è_JA from this step to determine the operating T_J for the intended circuit conditions and worst-case T_A and P_D. If T_J is close to the maximum allowed by the manufacturer, one or more of the following actions may be necessary.

• Improve the layout of the pc board by increasing the copper area connecting to the thermal slug.

• Decrease the power dissipation of the IC. Typically, the only feasible way to reduce power dissipation is to reduce the maximum load current.

• Decrease the operating temperature range of the system application.

To ensure the most accurate results possible, these suggestions should also be followed: Use a thermal-insulating mat on the bottom side of the board to prevent room temperature air from influencing the measurement. Also, attach a thermal enclosure to the thermal-induction system for full emersion of the device and application board. And finally, use an oven instead of a thermal-induction system and measure T_A only near the board, since ovens tend to have hot spots.

This method of IC thermal evaluation uses the OT protection circuit to find T_J. è_JA is then calculated, relying only on measuring T_A at no load and T_A with load. The method does not rely on direct temperature measurement of the case or junction. T_J and T_C are normally very difficult to measure accurately in the application.

When applying this method, be aware of the possible sources of error. First, triggering of the OT protection circuit may vary with input voltage (V_IN). However, this should not be an issue if V_IN is held constant. There are two ways to address the V_IN-related error. During step one of the evaluation, set V_IN to the maximum used by the application and vary the load current to change P_D. Or, during step two, vary V_IN to change P_D and then remeasure the OT trip point at no load with the final V_IN from step two.

Error can also result from the way thermal-induction systems may force an ambient temperature on only one side of the pc board. Since there is a thermal slug conducting heat through to the lower layers of the pc board, a long temperature chamber soak time (several minutes) may be required. The goal should be total emersion of the pc board and IC at the forced temperature. Furthermore, note that actual IC power dissipation includes adding in the factor (V_IN × I_Q) to the ideal P_D. Neglect V_IN × I_Q only when appropriate.