A New Thermal-Management Paradigm for Power Devices

Nov 1, 2008 12:00 PM
By Dr. Paul A. Magill, Vice President of Marketing and Business Development, Nextreme Thermal Solutions, Durham, N.C.

CPB Structure

Fig. 1 shows a scanning-electron microscope cross-section view of a thermal bump. The bump is structurally identical to a copper pillar bump (CPB) except that it has an extra layer, the thermoelectric layer, incorporated into the stackup. The addition of this layer transforms a standard CPB into a thermal bump. When properly configured electrically and thermally, this element provides active thermoelectric heat transfer from one side of the bump to the other side. The direction of heat transfer is dictated by the doping type of thermoelectric material (either a p-type or an n-type semiconductor) and the direction of electrical current passing through the material.

Fig. 2 shows a schematic of a typical CPB and a thermal bump for comparison. These structures are similar, with both having copper pillars and solder connections. The primary distinction between the two is the introduction of either a p-type or an n-type thermoelectric layer between two solder layers. The solders used with CPBs and thermal bumps can be any one of several commonly used tin-based solders.

Fig. 3 shows a device equipped with a thermal bump. The thermal flow is shown by the arrows labeled “heat.” Metal traces, which can be several micrometers high, can be stacked or interdigitated to provide highly conductive pathways for collecting heat from the underlying circuit and funneling that heat to the thermal bump.

The metal traces shown in Fig. 3 for conducting electrical current into the thermal bump may or may not be directly connected to the circuitry of the chip. In the case where there are electrical connections to the chip circuitry, on-board temperature sensors and driver circuitry can be used to control the thermal bump in a closed-loop fashion to maintain optimal performance. The heat that is pumped by the thermal bump and the additional heat created by the thermal bump in the course of pumping that heat will need to be rejected into the substrate or board.

Since the performance of the thermal bump can be improved by providing a good thermal path for the rejected heat, it is beneficial to provide high thermally conductive pathways on the backside of the thermal bump. The substrate could be a highly conductive ceramic substrate like aluminum nitride or a metal with a dielectric like copper, copper-tungsten or copper-molybdenum. In this case, the high thermal conductance of the substrate will act as a natural pathway for the rejected heat.

The substrate might also be a multilayer substrate like a printed-wiring board designed to provide a high-density interconnect. In this case, the thermal conductivity of the printed-wiring board may be relatively poor. Additionally, adding thermal vias (e.g., metal plugs) can provide excellent pathways for the rejected heat.

3-D Cooling

Combining thermal bumps with a 3-D chip stack structure will lead to thermal-management solutions that are also of a 3-D nature. By extending the only currently available option of passive backside cooling to also include active backside cooling, frontside heat removal as well as lateral heat removal, thermal management of the 3-D stack is significantly enhanced.

Backside cooling can be enhanced by the introduction of thermal bumps either into the heatsink to form an active heatsink or into the heat spreader. Fig. 4 illustrates this approach. In the figure, discrete devices are used to mitigate hot spots generated on the front side of a die. In fact, while the following example demonstrates the feasibility of hot-spot cooling using integrated thermoelectric cooling, it also reveals the limitations of cooling the hot spot from the backside of the die.

The hot spot is on the active side of the die, while the cooling device is attached to the copper heat spreader. The heat spreader is flipped onto the backside of the die, so that the cooler is located near the backside of the die, behind the first-level thermal interface material (TIM1).

In this specific example, the entire chip dissipates 62 W, with 2 W generated by the hot spot, resulting in a hot-spot heat flux of 1250 W/cm². The baseline temperature in the area of the hot spot without the thermoelectric cooler is about 111°C. In this example, the integrated thin-film cooler reduced hot-spot temperature by up to 14°C.

Fig. 5 illustrates the concept and implementation in practice for lateral heat removal. Here, the current flows from left to right, but the heat flows from the center of the module outwards.

For a 3-D chip stack, this lateral heat-removal concept can be combined with an interposer through which the heat can be removed. Here the thermoelectric material is underneath the substrate, and the heat is pulled from the center segment to the side. Therefore, the center of the platform will be cool, and the sides will be hotter as shown in Fig. 5. With this approach, heat is dissipated laterally to the walls.

The last approach is active-side cooling. In Fig. 6, an artist's rendition depicts the active side of a microprocessor. The smaller structures represent conventional copper pillar bumps next to the larger thermal bump. There could be as few as 10 to 20 or as many as 600 to 1200 thermal bumps strategically placed on the chip only in the vicinity of the hot spots. By doing so, it is not necessary to use a large amount of thermoelectric material — as little as 1 mm × 1 mm per hot spot — to achieve the desired cooling effect with a higher efficiency.

Optimal Cooling

The integration of high heat-flux thermal management solutions into the electronics packaging process is essential to higher operating efficiencies in power devices. Thin-film thermoelectric materials — for example, thermally active CPBs embedded in flip-chip packages — are an ideal solution. By combining thermally active CPBs with a 3-D chip stack structure, heat management is further enhanced via passive and active backside cooling, as well as front-side and lateral heat removal. Thermally active CPBs enable optimal cooling in a highly efficient, cost-effective manner.

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