Microchannels Take Heatsinks to the Next Level

Nov 1, 2006 12:00 PM
By Stephen A. Solovitz, Mechanical Engineer; Ljubisa D. Stevanovic, Advanced Technology Leader, Ener

Step Two: Computational Simulation

Although traditional first-order correlations provide a preliminary estimate of the heatsink performance, a more detailed 3-D analysis is necessary to understand the potential response. This is because the previous optimization method assumes 1-D flow through the microchannels, which does not consider entrance, exit and turning effects in the actual heatsink structure. A complete model for a device can be developed using a CFD tool, Icepak, which is a commercial package based on Fluent software. This program allows the study of a variety of shapes and materials, and it includes the effects of conduction, free and forced convection, and radiation. The software can examine both the laminar and the turbulent flow regimes, and it permits steady-state and transient solutions. The relative accuracy of this tool depends on the problem, but it can be accurate to within a few degrees Celsius. To determine absolute temperatures, it is best to anchor the results to experimental data, but the relative values will be fairly reliable.

As an example, consider an integrated microchannel heatsink on which a substrate having four 6-mm × 8-mm silicon rectifier diodes is mounted. In this case, the substrate consists of two 300-µm-thick layers of copper on either side of a 625-µm-thick insulating layer of aluminum nitride (AlN) ceramic. Beneath the four power devices, the bottom copper layer features a series of 65 parallel microchannels of 100-µm width, 300-µm height and 200-µm pitch. This substrate is then bonded to a copper baseplate of 6.35-mm thickness, the interior of the baseplate having a manifold topology that distributes the coolant from an inlet port through the microchannels and out an exhaust port. The baseplate has a footprint of 31 mm × 25 mm. If each silicon diode is assumed to dissipate 150 W, corresponding to 1.5 V and 100 A, the resulting heat flux is 313 W/cm2. This energy is generated at the top of each diode, as the power dissipation occurs at the p-n junction, which is located near the top surface of the device.

This design was simulated with water coolant entering at 20°C at various flow rates. Fig. 4 shows the diode temperature contours at an inlet flow rate of 0.95 LPM. The average diode temperature at this condition was 63.9°C. Based on a grid convergence study, the uncertainty of this model was found to be ±5% in temperature and ±10% in pressure.

At this condition, the diode-averaged thermal resistivity is about 0.14 (K)(cm2)/W from the semiconductor junction to the coolant. After subtracting the conductive thermal resistivity of each layer from the ceramic to the diode, the actual heatsink resistivity is approximately 0.06 (K)(cm2)/W, which is reasonably close to the results obtained from the 1-D analysis.

The next step in the design process is to experimentally validate the simulation results. When the microchannel passages are machined directly into the bottom copper layer of the AMB substrate via laser ablation of the copper, this results in a uniform series of regular trapezoidal passages, which have acute interior angles above 75 degrees, as seen in Fig. 5. While these are not rectangular in profile, the trapezoidal channels should still have heat-transfer performance within 10% of the base profile[9]. This substrate is then bonded to the heatsink base with the 65 microchannels centered beneath the four silicon diodes, resulting in an active cooling area of 2.2 cm2.

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