Power Electronics



Phase Shifting Optimizes Multistage Buck Converters

Jan 1, 2007 12:00 PM
By Robert Taylor, Applications Engineer, and Wei Liu, Applications Engineer, Texas Instruments, Dall



Phase Stackability

In high current systems, there are often lower current states and sleep states. During these states, it is usually desirable to reduce the power consumption. One way to achieve this is to shut down unneeded phases. Conversely, there are times in which more power is needed and another phase could be added. Another useful feature is the ability to build modular systems, so that more phases can easily be added or removed if the system specifications change.

The TPS40140 from Texas Instruments is a dedicated power-supply controller for low-voltage and high-output current applications. It has a very wide input-voltage range (2 V to 40 V) and a wide output range (0.7 V to 5.8 V) that fits most point-of-load (POL) applications. Each TPS40140 can be configured for a stackable multiphase synchronous buck supply. A stackable supply is one in which more phases can easily be added to increase the current capability of the power supply.

In a multiphase configuration, one TPS40140 is configured as a master, while the others operate as slaves. The same IC is used for both the master and the slaves. A digital clock is generated in the master and distributed to the other slave ICs. The slaves detect the clock signal and then synchronize to the appropriate phase angles.

The TPS40140 can provide fully interleaved operations for 2, 3, 4, 6, 8, 12 and 16 phases. For this application with the 120-A output load, three TPS40140 ICs are used to form a 6-phase converter. Programming the devices for this configuration is accomplished through a resistor stack as shown in Fig. 5. The value for each resistor in the stack is 39 Ωk. The phase select pin of the master supplies 20 µA to the top of the stack, and each slave senses the voltage across its own phase select pin. The dual outputs of each TPS40140, master or slave, are 180 degrees out of phase.

The inductor dc resistance (DCR) method is the preferred method for sampling the output current for the TPS40140. This is a lossless approach, as opposed to using a discrete current sense resistor, which occupies board area and impacts efficiency as well. The inductor DCR implementation is shown in Fig. 6. The accuracy of this technique depends on the ability to match the time constant of the R1-C1 circuit with the L1 DCR circuit.

Fully interleaved multiphase synchronous buck solutions offer significant advantages over noninterleaved solutions. The interleaved solution reduces the input and output current ripple and, thus, the number of necessary capacitors. It also reduces the power-supply area and total cost while improving performance and efficiency. Table 4 summarizes the advantages of the interleaved solution.

Parameter Interleaved Noninterleaved
Output capacitors 1 SP per phase 6 SP per phase
Input capacitors 1 ceramic per phase 4 ceramic plus 2 OS-CON per phase
Efficiency at 120 A 88.70% 85% (estimated)
Size Baseline 25%
Cost Baseline 25%
Table 4. Interleaved design shows advantages over noninterleaved.

References

  1. TPS40140 datasheet, Texas Instruments, July 2006.

  2. Using the TPS40090EVM-002 User's Guide, SLUU195, Texas Instruments, June 2004.


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