Transient Response Counts When Choosing Phase Margin

Nov 1, 2008 12:00 PM
By Christophe Basso, Applications Manager, ON Semiconductor, Toulouse, France

The design of a closed-loop switch-mode power supply creates a path between the variable a designer wants to monitor and the control pin of the designer's converter. This control pin can be the peak current setpoint in a current-mode power supply or the duty-cycle input of a voltage-mode controller. If the monitored variable deviates from its imposed target, the controller reacts by either increasing or decreasing the delivered power to the load via an amplified error signal fed to its control pin. However, frequency-dependent gain and phase (H(s)) affect the power stage.

To ensure that the power supply behaves as specified, the designer must shape the return path (G(s)) to compensate for the power-stage response at certain frequency points. Among the important parameters are:

• DC gain for the smallest static error and the lowest output impedance

• Crossover frequency for the required response speed.

At the crossover point, where the loop-gain module (T(s)) equals 1, the phase rotation affects the returning signal. If the signal returns in phase with the control signal, these are the conditions that create an oscillator, which is something one wants to avoid. To make sure the signal does not return in phase (i.e., with a 360-degree phase rotation), a designer must plan a certain amount of margin between the phase rotation of T(s) at the crossover frequency and the 360-degree limit, which is the phase margin. How much phase margin should one ask for to provide performance and stability? Textbooks often suggest 45 degrees. Should designers try to get more than that? Let us analyze how much.

Second-Order System

Fig. 1 shows a LC low-pass filter where the resistor (R) represents the network losses. This architecture could be seen as a simplified lossy output filter of an unloaded buck converter. In that case, the input voltage (V_IN) is the average level of the square-wave signal present at the power switch/freewheel diode cathode junction. For the purpose of this analysis, this average voltage will be ac modulated, and we are looking for the expression of the output voltage across the output capacitor. The transfer function, H(s) = V_OUT (s)/V_IN (s), of this structure will then be calculated.

Using Laplace notation, Eq. 1 describes the transfer function of this RLC network:

By rearranging the expression, one can identify the quality coefficient and the resonant frequency:

where ω_R is the resonant frequency:

The idea now is to evaluate the response to a 1-V input step and change the quality coefficient values by tweaking resistor R1. This resistor is representative of the losses in the network such as the equivalent series resistance (ESR) of the inductor. In Fig. 1, the calculation is automated of R, whose value is evaluated according to the selected quality coefficient. One also could multiply Eq. 1 by 1/sec and calculate the inverse Laplace transform to obtain the temporal response. In this case, a SPICE simulation is faster. The results appear in Fig. 2.

As one can see, low coefficient values lead to a completely oscillation-free response, whereas values above 0.5 give birth to overshoots. As the quality coefficient increases, meaning fewer losses, the overshoot gets larger. If the quality coefficient would go to infinity, it would imply an undamped LC network, keeping oscillations going further to an excitation.

Want to use this article? Click here for options!
© 2007 Penton Media, Inc.