Evaluating TVS Protection Circuits with SPICE
Jan 1, 2006 12:00 PM
By Jim Lepkowski, Senior Applications Engineer, ON Semiconductor, Phoenix, and William Lepkowski, Un
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Forward bias region: Diode D1 is the key component when voltage V
|
Leakage region: The leakage or reverse bias before breakdown region is defined when voltage V
|
Breakdown region: The breakdown region is modeled by EV1, D2 and R
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Impedance characteristics: The transient response of the macro-model is simulated by including the TVS device's impedance versus frequency characteristics. It is necessary to model the impedance because the fast rise time and high peak current of the surge pulse creates high-frequency information that influences the transient performance of the clamping response.
The impedance plot of a TVS avalanche diode is shown in Fig. 4. The measured impedance can be modeled by an equivalent circuit that consists of resistor (R
C
Modeling the inductance ensures the magnitude of the overshoot pulse due to the inductance (V = L (ΔI/Δt)) of the IC package is simulated. Matching the capacitance helps in predicting the shape of the clamped waveform, while including an accurate resistance term is important in predicting the power capability of the device.
Simulation Test Results
The ability of the SPICE macro-model to predict the performance of a TVS device is shown by comparing simulation and bench data for the 8 × 20-µs and 10 × 1000-µs surge tests. These waveforms are often used to specify the power rating of a TVS device, in addition to representing the surge pulses produced by common noise sources. The surge pulses are defined by their rise time (t
Fig. 5 shows the clamping performance of a TVS diode for the 8 × 20-µs surge test. The 8 × 20-µs surge pulse represents the positive voltage transient created by the sudden interruption of current in a load that is connected in parallel with an electronic module. Low-side drivers that are used to turn on electronic modules, motors and relays are examples of systems that can produce this surge pulse.
The clamping performance of a TVS diode for the 10 × 1000-µs surge test is shown in Fig. 6. The 10 × 1000-µs surge pulse occurs when power is removed from an inductive load and the device under test (DUT) simultaneously. The DUT remains connected in parallel with the inductance, which produces a negative surge voltage. DC motors, solenoids and relays are common examples of inductive loads that can produce this surge pulse.
The discrepancy between the measured and simulated 10 × 1000-µs clamping voltage is due to the self-heating of the device by the surge current. In addition, the macro-model was calibrated to the 8 × 20-µs pulse instead of the 10 × 1000-µs pulse.
The accuracy of the predicted clamping voltage for high-energy, long-duration surges can be improved by calibrating the model with the 10 × 1000-µs pulse. Future enhancements of the macro-model will include integrating a thermal model to simulate the increase in the TVS device's junction temperature due to self-heating.
Macro-models provide an accurate SPICE representation of the TVS avalanche diode's current and voltage characteristics for most applications. The macro-models solve several of the limitations associated with the SPICE diode “D” statement and the curve-fit models. Macro-models provide a powerful design tool to analyze surge suppression circuits; however, they are not a replacement for hardware development tests. A summary of the limitations of the macro-models is shown in Table 3.
Enhancing System Reliability
System designers are being challenged to meet stringent surge-suppression requirements. In order to produce competitive products, they must increase the reliability and reduce the size and cost of their circuits. TVS avalanche diodes can be used to increase the surge immunity without significantly adding to the cost, size and complexity of power circuits. The ability of TVS diodes to dissipate surge voltages that contribute to the early failure of semiconductors can be evaluated using SPICE macro-models.
References
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Bley, M., Filho, M. and Raizer, A. “Modeling Transient Discharge Suppressors,” IEEE Potentials, August/September 2004.
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Hageman, S. “Model Transient Voltage Suppression Diodes,” MicroSim Application Notes, 1997.
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Lepkowski, J. “AND8250 — Zener Macro-Models Provide Accurate SPICE Simulations,” ON Semiconductor, 2005.
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Wong, S., Hu, C. and Chan, S., “SPICE Macro Model for the Simulation of Zener Diode Current-Voltage Characteristics,” International Journal of Electronics, Vol. 71, No. 24, August 1991.
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