Keeping Parts Cost Down in Mobile CPU Power Supplies

Oct 1, 2006 12:00 PM
By Tod Schiff, Senior Field Applications Engineer, Computing Segment, Analog Devices, Beaverton, Ore

Capacitor Recommendations

The high-side MOSFET's drain current is a rough square wave with a duty ratio equal to n × V_OUT/V_IN and amplitude of the maximum output current times 1/n. Low-ESR input capacitors, sized for the maximum root-mean-square (RMS) current, must be used to filter ripple at the input. This RMS current is:

With a maximum duty cycle D_MAX of 0.144 for minimum 8-V battery voltage, Eq. 5 gives an I_CRMS that is equal to 9.05 A.

Capacitor manufacturers' current ratings may be based on only 2000 hours of life, so capacitors with ratings higher than the calculated I_CRMS should be used. The input capacitor's value is determined by the acceptable amount of ripple. The capacitor's ESR and ac current must be kept low to meet system requirements.

Response to Fast Load Changes

The controller must respond to maximum load steps and load releases transparently. Older architectures with excessive turn-on delays for each phase aren't fast enough. The controller, drivers and MOSFETs also need to be fast enough to meet on-the-fly V_VID change specifications.

Older single-edge designs wait until the next clock cycle to respond to load transients that occur while the controller is inactive. Clocking only one phase at a time, they force the power supply to provide current from the bulk capacitors. When they catch up, they can typically only power up one phase at a time. Newer controllers use asynchronous correction to reduce load-step response time with fewer capacitors. They can turn on all phases at once to supply CPU current demands without built-in clock delays.

Synchronous buck controllers such as the ADP3207A from Analog Devices sense sudden load changes. They restart all phases in sync with the load step, supplying maximum current without waiting. Their typical all-phase response time to a worst-case step is 1 µs or less. Extra current goes into the load, with normal multiphase operation following after the initial load-step demand is satisfied, so ripple doesn't increase.

Some controllers turn on all phases at once to handle large load steps. Most of them use a linear transfer characteristic to process load changes and control outputs. The ADP3207A on the other hand uses nonlinear gain to respond to load steps. Large signals from a maximum load step hit the high-gain part of its transfer curve to turn on all output phases. Smaller load steps at the low-gain part of the curve cause normal PWM changes to individual phases. This gives better noise immunity and low jitter, since most noise will be on the small-signal, low-gain part of the transfer curve. Controllers with a constant high gain are much more susceptible to noise.

Most mobile applications use 2-phase supplies, but these controllers can easily be configured for three phases for higher efficiency. Input current to each phase decreases with the number of phases, so battery drain is lower at any given time. The penalties are cost and space for additional components.

Fig. 1 shows an all-phases-on response to a load step. Two phases were used in this example. Mobile controllers need to operate efficiently in battery-saving low-power modes. The ADP3207A changes to a single-phase operating mode when the processor selects low power. In this mode, the switching frequency is proportional to the load current for best power efficiency. The single-phase synchronous MOSFET is controlled to prevent reverse inductor current. A circuit example appears in Fig. 2.