The J/K Method: A Technique to Select the Optimal MOSFET

Jun 1, 2010 12:00 PM
PETER JAMES MILLER Applications Engineer, Texas Instruments, Dallas, TX

While high efficiency is the goal; it may simplify the task to focus on losses instead. Power losses are easily attributed to specific devices, so a design that minimizes losses will naturally maximize efficiency. Also, a focus on losses highlights where the largest efficiency gains might be realized. Reviewing the selection process for the higher loss components will more easily realize efficiency improvements than similar reviews of less lossy components.

Calculating the power loss caused by a device is not the same as calculating the power dissipation within a device. When considering the temperature rise and reliability, it is important to know how much power is actually being dissipated within a given device. However, when selecting a device for efficiency, it is much more important to understand the power loss caused by that device, even if that power is dissipated in other circuit components. For example, when designing a snubber circuit, it is the charging and discharging of the capacitor that causes power loss, but it is the resistor that actually dissipates that power. The same is true in a MOSFET. While gate drive power is typically dissipated within the driver, the power loss must be attributed to the MOSFET, even if it doesn't actually heat up the MOSFET itself. Power dissipation and power loss equations may be different and shouldn't be used interchangeably.

MOSFET LOSS FACTORS

There are a number of different loss factors caused by switching MOSFETs in switch mode power supplies: conduction loss, switch transition loss, body diode conduction loss, gate drive loss, output capacitance loss and reverse recovery loss. For the purpose of MOSFET selection, these can be divided into three groups: conduction losses as a result of the finite resistance of the MOSFET; switching losses as a result of the finite time it takes to turn the MOSFET on and off; and fixed losses that are independent of the finite resistance or finite switching time. Given a MOSFET technology, switching losses are proportional to MOSFET size while conduction losses are inversely proportional to MOSFET size. Selecting an optimal MOSFET is the act of balancing MOSFET size between conduction and switching losses.

The dynamic performance section of a MOSFET datasheet typically shows a number of parasitic charges. On newer datasheets you might find total gate charge (QG), pre-threshold gate-to-source charge (QGS1), post-threshold gate-to-source charge (QGS2), and gate-to-drain charge (QGD), while older datasheets might not list all of these charging factors. While all of these charges are important to determine the exact switching of the MOSFET, only those most tightly linked to the transition of a MOSFET from its high impedance OFF state to its low impedance ON state are critical for MOSFET selection. Figure 1 shows the relationship between gate voltage and gate charge for a typical power MOSFET.

This transition occurs as the gate drive voltage transitions from its threshold voltage (Vt) to the plateau voltage (VPlat). After this, during period four, the MOSFET channel resistance improves only a small amount during and switching losses are virtually zero. The predominant charges that define this period are the post-threshold gate-to-source charge (QGS2) and the gate-to-drain charge (QGD). These two factors summed form the switching charge (Qsw) that best defines the switching time, periods two and three, where the vast majority of switching losses occur. When QGS2 is not given as a separate factor, it can typically be estimated as ½ QGS (QGS1 + QGS2). Figure 2 is a plot of a typical power MOSFET's voltage and current during switching.

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