Interleaving is Good for Boost Converters, Too

May 1, 2008 12:00 PM
By Ron Crews, Principal Applications Engineer, and Kim Nielson, Senior Engineering Technician, Natio

Operational Results

Referring to the plots in Fig. 4, using data from the actual prototype, efficiencies range from 95% to 98% up to the full load current of 4 A, and over a 3.5:1 input-voltage range. In the very low current region (less than 200 mA) where overhead-bias currents dominate, the converter does have less efficiency, but this is true for all regulators. These plots illustrate the possibility of building a compact, high-power boost converter without sacrificing excellent efficiency.

Referring to the thermal images in Fig. 5, the component with the maximum temperature is Q2, which is operating at a case temperature of 77°C. Q2 is hotter than Q1 since it is directly opposite D2, which also dissipates considerable heat. Since the junction-to-case thermal resistance of Q2 is 1°C/W, and since Q2 dissipates about 4 W maximum, its junction temperature is about 81°C. The ambient temperature is 25°C. Q2 is the hottest component on the board, and is well within its thermal rating. Refer to the board photos in Fig. 3 for location of components.

Input and output ripple reduction are some of the benefits of an interleaved converter. Since the output ripple is double the frequency of the individual phases and at a lower root-mean-square (rms) current value, the designer has the choice of using smaller output capacitors with the same ripple as a single-phase converter or using larger capacitors to achieve even lower output ripple.

Effective ripple is a function of duty cycle. Using data from the actual prototype, Fig. 6 and Fig. 7 illustrate the input and output ripple currents versus duty-cycle relationships. Ripple reduction is a function of duty cycle, as the degree of ripple overlap is a function of duty cycle. There is near-perfect cancellation of ripple at 50% duty cycle. This opens the intriguing possibility of building a converter with little to no output ripple if the designer can limit V_IN to the proper value for 50% duty cycle.

In the more general case, ripple is reduced by as much as 50% compared to an equivalent-power single-phase converter. Likewise, inductor selection is flexible with the two-phase design. One-half the single-phase inductor value can be chosen, which will make each inductor smaller, but which results in the same ripple currents as the single-phase design. Or the inductors can remain the same value as in the single-phase design, reducing the ripple by one-half.

The proper tradeoffs will depend on the overall design goal. Attention to ESR requirements will keep capacitors within temperature ratings and the output voltage ripple within specifications.

Fig. 6 plots normalized output capacitor ripple current versus duty cycle. This graph shows the ripple cancellation at 50% duty cycle and the general ripple reduction across all duty cycles with the two-phase topology. The output capacitor must be chosen to withstand the high ripple current inherent in a boost design. However, as can be seen in Fig. 6, it can be significantly smaller than in a single-phase implementation.

Fig. 7 plots normalized input-capacitor ripple current versus duty cycle. In this case, the normalization is chosen to simplify the graph scale.

This prototype illustrates that the many benefits of interleaving, which are routinely used in buck regulators, apply equally well to an interleaved boost design. In the design presented here, the impressive power-conversion efficiency results in a 192-W, all-surface-mount design that will operate without airflow at room ambient.

This design could easily be upgraded to higher power by the proper selection of power components. Also, since the selection of output voltage and input voltage are at the designer's discretion, the basic design could be adapted to many battery-powered applications. By overdesigning the power components and/or reducing the switching frequency, efficiency could be improved if that were the primary design goal.

Click here for the enhanced PDF version of this article

Acceptable Use Policy blog comments powered by Disqus