A New Way to Model Current-Mode Control

May 1, 2007 12:00 PM
By Robert Sheehan, Principal Applications Engineer, National Semiconductor, Santa Clara, Calif.

Current-Mode Slope Compensation

The difference between the average inductor current and the dc value of the sampled inductor current can cause instability for certain operating conditions. This instability is known as subharmonic oscillation, which occurs when the inductor ripple current does not return to its initial value by the start of the next switching cycle. Subharmonic oscillation is normally characterized by observing alternating wide and narrow pulses at the switch node. Adding an external ramp (slope compensation) to the current-sense signal prevents this oscillation.

Formal derivation of the criteria for slope compensation is covered in reference 1. For the purpose of this analysis, a discussion of feed-forward techniques and some illustrations will suffice.

For the buck regulator, the modulator voltage gain (KM) was found to be VIN / VRAMP. For voltage-mode operation, the gain varies with VIN. Feed-forward techniques are often employed to stabilize the gain. This is typically done by generating VRAMP with a voltage-controlled current source or a fixed resistor charging a capacitor from VIN.

Peak current-mode control is often referred to as having inherent line feed forward. While basically true, this is not quite ideal. The sensed inductor up-slope — which is used as VRAMP / T for the modulator, where T is the switching period — is equal to (VIN - VO) × (RI / L). In order to stabilize the gain, an external ramp of VSLOPE / T = VO × (RI / L) must be added to the current-sense signal. The result is VRAMP / T = VIN × (RI / L).

Fig. 9a and 9b shows the under-damped condition, where subharmonic oscillation occurs with a duty cycle greater than 50%. The relationship of Q as shown in the graphs is defined in reference 1. To demonstrate the under-damped condition, VSLOPE / T = (0.1) × VO × (RI / L). By adding a compensating ramp equal to the down-slope of the inductor current, any tendency toward subharmonic oscillation is damped within one switching cycle. These conditions are shown in Fig. 9c and 9d.

For peak current-mode control, when the slope of the compensating ramp is equal to one-half the down-slope of the inductor current, infinite line rejection is achieved. Though a desirable operating point, this represents a special case. As the theoretical limit for stability of the current loop, the tendency toward subharmonic oscillation increases as the duty cycle approaches unity. To ensure stability of the current loop, the optimal compensating slope remains equal to one times the down-slope of the inductor current.

For valley current mode, the down-slope of the inductor current is presented to the modulator, which is VO × (RI / L). This transposes the function of the external ramp. It is now necessary to use slope compensation equal to the up-slope of the inductor current, so VSLOPE / T = (VIN - VO) × (RI / L). Again, the result is VRAMP / T = VIN × (RI / L).

For emulated peak current mode, the valley current is sampled on the down-slope of the inductor current. This is used as the dc value of current to start the next cycle. A slope-compensating ramp is added to produce VRAMP at the modulator input.

The primary application for emulated peak current mode is high input voltage to low output voltage operating at a narrow duty cycle. In any practical design, device capacitance and wiring inductance may cause a significant leading-edge spike on the current-sense waveform, followed by an extended period of ringing. By sampling the inductor current at the end of the switching cycle and adding an external ramp, the minimum on time can be significantly reduced, without the need for blanking or filtering, which is normally required for peak current-mode control.

To determine the correct slope compensation, the most salient feature is the absence of any ramp from the inductor, since only the dc value of the valley current is sampled. Formal derivation in reference 1 has shown the optimal compensation to be VSLOPE / T = VRAMP / T = VIN × (RI / L). This is consistent with the results for both peak and valley buck regulators.

Since the slope compensation requirement is independent of the duty cycle, an interesting observation can be made. If the slope of the ramp is made less than (0.5) × VIN × (RI / L), the circuit will exhibit subharmonic oscillation at any duty cycle.

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