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Dual-Edge PWM Improves Multiphase Regulators

Jul 1, 2007 12:00 PM
By Weihong Qiu, Principal Applications Engineer of Computing Products, and Greg Miller, Vice Preside


Reducing Output Capacitance


To increase the inductor current slew rate in multiphase applications, it is preferred that more than one phase be turned on simultaneously, based on the transient step load. The APP scheme is excellent for this demand. As shown in the left side of Fig. 4, all phases are turned on when VCOMP jumps very high in response to a large output-voltage change associated with a high di/dt load step. Since the total inductor current increases very fast and reaches the load current quickly, the current drawn from output capacitors is reduced. The voltage regulator with the conventional trailing-edge modulation scheme will need more output capacitors to provide additional current when the total inductor current increases slowly, as shown in the right side of Fig. 4. A similar case could be examined for leading-edge modulation on a load stepdown.

Intersil has introduced a family of multiphase controllers based on the APP modulator. One typical application circuit of a voltage regulator with the ISL6312A is shown in Fig. 5. The ISL6312A employs the APP modulation scheme to achieve excellent transient response with reduced bulk output capacitors. With three internal drivers, ILS6312A can build a compact solution with higher performance and lower cost than traditional multiphase modulators. Some other advanced features of ISL6312A include differential remote-voltage sense, differential phase-current sense, phase-peak-current limit and a load-current indicator function.

With the APP modulator, the transient response of the voltage regulator is improved significantly. Without extra delay and an extremely fast transient response, the switching frequency can be reduced to increase efficiency without sacrificing transient performance. Due to the simultaneous all-phase-on feature, larger-output inductors can be used to reduce the ripple phase current. Or, with the same output inductor, the output capacitors can be reduced to meet the same transient requirement. Furthermore, the benefits of using coupled inductors can be further improved with the APP modulator. Typically, ceramic capacitors are used to absorb the initial voltage spike caused by the fast load current slew rate and the ESL impact of the bulk capacitors. Therefore the selection of the ceramic capacitor is similar to that of the conventional voltage regulator. However, the fast current slew rate of the total inductor current during a transient event will reduce the demand on the bulk capacitor ESR. Therefore, a less-expensive bulk capacitor solution can be employed in the voltage regulator with the APP modulator.

With conventional modulation schemes, the ESR of the bulk capacitor must be less than the desired loadline value. For a typical 1-mΩ loadline design, the equivalent ESR of the bulk capacitors should be around 0.7 mΩ for the voltage regulator with a conventional modulation scheme. If 7-mΩ bulk capacitors are employed, this equates to a requirement of 10 bulk capacitors. With the APP modulator, the equivalent ESR of the bulk capacitor may be chosen above the desired loadline, depending on the output inductor value. In the following 4-phase design with a 1-mΩ loadline, the equivalent ESR of the bulk capacitors is only 1.17 mΩ, equivalent to six 7-mΩ bulk capacitors in parallel.

Transient response test data on a 4-phase voltage regulator is included in Fig. 6. With only six bulk-output capacitors (680 µF), the voltage regulator based on the ISL6312A using APP met the stringent transient response requirement, while 10 bulk capacitors (560 µF) were needed in the voltage regulator with the conventional trailing-edge modulator. The capacitance values of individual bulk capacitors are different for the two regulators. However, the ESR value, which determines the undershooting characteristics, is the same for both capacitor types.

As can be seen in the left side of Fig. 6, all phases are on immediately to provide the maximum total current slew rate from the output inductors when a 100-A load step is applied to the system. All phases are then immediately off at load release to reduce the inductor current as soon as possible, as shown on the right in Fig. 6.


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