Power Limits Make Hot Swapping More Robust

Jan 1, 2008 12:00 PM
By Neil Gutierrez, Design Engineer, High-Voltage Power Management Group, National Semiconductor, Pho

When controlling the current during a hot-swap event or short-circuit fault condition, the external MOSFET must remain within the SOA to prevent FET failure. Fig. 2 shows Vishay's SUM40N15-38 FET SOA curve.^[2] It has a maximum drain-to-source voltage (V_DS) of 110 V, and at a low V_DS, the current is limited due to the R_DSON of the FET. The curves shown with time are the maximum energy limitations of the FET.

A horizontal line can be drawn on the SOA curve (the green line in Fig. 2) to indicate a controller with only current-limit control. During normal operation (i.e., V_DS is low), the current is limited to 5 A and the FET is within the SOA boundaries. However, at a large V_DS, the controller limits the current to 5 A and, depending on the programmed fault time, the FET may go outside the SOA. For example, if the system backplane voltage is 50 V, the current limit is set to 5 A and the programmed fault time is 40 ms, then a short circuit on the output would cause the FET to operate beyond the implied 40-ms SOA (the green dot in Fig. 2).

The red curve in Fig. 2 indicates the combination of both the current and power limiting of the LM5069 on the SOA curve. The programmed current limit is set to 5 A, and the power limit is set to 50 W. The fault time is again programmed to 40 ms.

When the 50-V output is shorted, the part will no longer operate in the current-limiting mode (5 A), but instead operates in the power-limiting mode (50 V × 1 A = 50 W). The FET will remain below the implied 40-ms SOA curve and prevent the FET from failing (the red dot in Fig. 2).

At a V_DS < 10 V, the part goes into the current-limiting mode and provides the necessary current load to the output all the while keeping the FET inside the SOA. The LM5069 power-limit feature will only take control if the power across the FET tries to go beyond the programmed limit of 50 W. Otherwise, the current-limit feature controls the FET.

Bench Data

Application boards were made for both the LM5069 and current-limit controllers. The online version of this article shows their two test-board circuits, but their respective test results are shown here. Both parts had the condition of a 50-V input voltage, a 5-A current limit and a 40-ms fault time. The LM5069 had the added feature of a 50-W power limit. Both applications shorted the output via a load resistor causing the V_DS to increase.

This is the application board circuit used for the National Semiconductor LM5069 hot-swap controller operation with both current-limiting and power-limiting features. (click image for larger version)

This is the application board circuit used for the National Semiconductor LM5069 hot-swap controller operation with a current-limiting-only feature. (click image for larger version)

The oscilloscope plot for the controller with current limiting only is shown in Fig. 3, while a plot for the LM5069 is shown in Fig. 4. The output load increased the V_DS to 30 V. Initially, the current is limited to 5 A, but after 10 ms the FET fails and the input voltage shorts to the output voltage. The input voltage craters and limits the current to the current limit of the voltage supply. The timer reaches the 40-ms timeout, but cannot shut off the gate since the FET is damaged.

Looking at the SOA curve, the FET can only withstand a 10-ms pulse at a V_DS of 50 V and a drain-to-source current (I_DS) of 5 A. Once the FET goes beyond 10 ms due to the current-limit control, the FET fails (the red dot in Fig. 5).

As shown in Fig. 4, the output loading increases V_DS to 45 V, and the LM5069 limits the power across the FET to 50 W. Once the timer reaches the fault threshold, the part shuts off the FET. The LM5069 controls the FET well within the SOA curves in this shorted condition (the blue dot in Fig. 5).

Fig. 6 shows the condition of pure current limiting by the LM5069. The output loading caused the current to increase, but not so heavily as to cause an increase in V_DS. The LM5069 limits the current to 5 A and the FET shuts off after the programmed fault time of 40 ms. Again, the LM5069 controls the FET inside the SOA (the green dot in Fig. 5).

References

1. Bearfield, Jonathan M., “Introduction to Hot Swap,” TechOnline, www.techonline.com, 2005.

2. Vishay SUMN40N15 data sheet, www.vishay.com.

3. National Semiconductor LM5069 data sheet, www.national.com.