Dynamic Power Control Cuts Dissipation of Quad 16-bit DAC

Sep 1, 2010 12:00 PM
By Sam Davis, Editor-in-Chief

A four-channel, 16-bit DAC has innovative dynamic power control that automatically reduces the IC's power dissipation if the load power tends to exceed its specified amount.

Find a downloadable version of this story in pdf format at the end of the story.

ANALOG DEVICE'S AD5755/AD5735 is a quad, voltage and current output digital-to-analog converter (DAC) intended primarily for applications in factory automation, process controls, and industrial instrumentation. The AD5755 incorporates dynamic power control that lowers power consumption without impacting safety and reliability, enabling increased system productivity. Dynamic power control counters the density of factory process control systems reaching levels where rising power consumption and thermal issues may undermine equipment performance, reliability, and safety.

Dynamic power control (DPC) reduces power consumption in standard designs when using the IC in the current output mode. In standard module designs, load resistor values can range from 50 Ω to 750 Ω (typical). Output module systems must source enough voltage to meet the compliance voltage requirement across the full range of load resistor values. For example, a 4-20 mA loop when driving 20 mA requires a compliance voltage of >15V. When driving 20 mA into a 50 Ω load it requires only 1V compliance. The AD5755 senses the output voltage and regulates it to meet compliance requirements, plus a small headroom voltage.

By reducing self-heating and elevated operating temperatures, DPC allows the support of four times more channels than other integrated converters, enabling up to four times more terminals at twice the performance in a single analog I/O module. The converter also lowers power consumption by 80% (Fig. 1) and net thermal rise (silicon temperature minus ambient temperature) by 75% (Fig. 2) compared with other control driver technologies.

The IC is a digital to current loop and voltage output converter that meets the requirements of industrial process control applications. It provides a high precision, fully integrated, low cost single-chip solution for generating current loop and unipolar/bipolar voltage outputs. The current ranges available are 0 to 20mA, 0 to 24mA and 4 to 20mA. The voltage ranges available are 0 to 5V, ±5V, 0 to 10V and ±10V. The current and voltage outputs are available on separate pins and only one is active at any one time. It operates with a power supply input from -26V to +33 V.

The 16-bit AD5755 offers a full channel spec with a maximum total unadjusted error of 0.05 %, a relative accuracy of ±0.003% max, and does not require system calibration, which shortens development time and reduces system maintenance costs. In addition, the single chip architecture combines multiple converters, power management, linear and other functions, increasing MTTF (mean time-to- failure) and improving reliability. Also included are various diagnostics, which simplify the design task and boost operational up-time.

The IC, which supports standard industrial voltage and current output ranges, can be used with standard HART (Highway Addressable Remote Transducer) protocol modems. Also integrated on-chip are user-accessible offset and gain registers and a 30-MHz SPI (serial peripheral interface) compatible interface. The device is specified over the extended industrial temperature range of -40°C to +105°C and is housed in a 9 mm × 9 mm LFCSP (lead-frame chip scale package).

OUTPUT VOLTAGE

The AD5755's architecture consists of matched DAC sections shown in Fig. 3. The voltage output from the DAC core is either converted to a current that is then mirrored to the supply rail so that the application simply sees a current source output with respect to ground or it is buffered and scaled to output a software- selectable unipolar or bipolar voltage range.

The voltage output amplifier can drive a 1 kΩ load in parallel with 2000 pF to A_GND. The slew rate is 1 V/µs with a full-scale settling time of 10 µs. (10V step). The voltage output amplifier can drive capacitive loads of up to 1µF with the addition of non-polarized compensation capacitors on each channel. The compensation capacitor allows the AD5755 to drive higher capacity loads and reduce overshoot, but also increases settling time and therefore affects system bandwidth. Without the compensation capacitor, the IC can drive capacitive loads up to 20nF.

The AD5755 has a FAULT pin that is an active low open-drain output allowing several AD5755 devices to be connected together to one pull-up resistor for global fault detection. The FAULT pin is forced active by any one of the following:

• Voltage at IOUT attempts to rise above the compliance range, due to an open-loop circuit or insufficient power supply voltage.
• A short detected on the voltage output pin. You can program the short circuit current limit to be 15 mA or 8 mA.
• An interface error.
• The core temperature of the AD5755 exceeds approximately 150°C.

The AD5755 contains an integrated +5V voltage reference with initial accuracy of ±2mV max and a temperature drift coefficient of ±5 ppm max. The reference voltage is buffered and externally available for use elsewhere within the system.

An ALERT pin on the AD5755 provides an active high CMOS output. Also, the AD5755 has an internal watchdog timer, if enabled, it will monitor SPI communications. If there have been no new commands sent to the AD5755 from the system controller within a programmable timeout period, the ALERT pin will go active.

The AD5755's slew rate control allows the user to control the rate at which the output value changes. This feature is available on both the current and voltage outputs. With slew rate control disabled, the output value will change at a rate limited by the output drive circuitry and the attached load. If desired, the user can reduce the slew rate by enabling a slew rate control feature.

LAYOUT GUIDELINES

In any circuit where accuracy is important, careful consideration of the power supply and ground return layout helps to ensure the rated performance. The AD5755 data converter's layout should separate the analog and digital sections. If the AD5755 is in a system where multiple devices require an analog ground-to-digital ground connection, make the connection at only one point. The star ground point should be established as close as possible to the IC.

The IC should have ample supply bypassing of 10 µF in parallel with 0.1 µF on each supply located as close to the package as possible, ideally right up against the device. The 10µF capacitors should be the tantalum bead type. The 0.1 µF capacitor should have low equivalent series resistance (ESR) and low equivalent series inductance (ESL) such as the common ceramic types, which provide a low impedance path to ground at high frequencies to handle transient currents due to internal logic switching.

Power supply lines to the AD5755 data converter should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals such as clocks should be shielded with a digital ground to avoid radiating noise to other parts of the board and should never run near the reference inputs. A ground line routed between the I²C SDI and SCLK lines helps reduce crosstalk between them (not required on a multilayer board that has a separate ground plane, but separating the lines helps). It is essential to minimize noise on the REFIN line because it couples through to the DAC output.

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