Feedback Circuit Improves Hysteretic Control

Mar 1, 2008 12:00 PM
By Kevin Daugherty, National Semiconductor

Modifying the conventional hysteretic converter circuit’s feedback network results in a predictable switching frequency with less variation relative to external components.

The hysteretic power supply is simpler than the voltage- or current-mode closed-loop-control dc-dc switchers, although its simplicity may be a bit deceiving due to component variations and potential sources of “injected” feedback voltage. Along with its simplicity, the hysteretic power supply is popular today for its low cost, inherently stable operation (with no need to perform loop analysis), extremely fast load response time that requires no compensation, and suitability for applications requiring low dropout because the main switch is a p-channel power MOSFET that can be driven up to 100% duty cycle.

The hysteretic controller IC is the key element in the conventional hysteretic power supply. And, even better results are possible with a simple modification to the conventional hysteretic controller IC circuit. That modification requires only the addition of a single capacitor and resistor in the feedback circuit of the controller IC. To describe the modification, we will first look at the performance of the conventional hysteretic controller.

Principles of Operation

As shown in Fig. 1, at the heart of the hysteretic controller IC is a comparator with a small amount of voltage hysteresis (V_HYS). When the comparator feedback voltage exceeds the internal reference voltage (V_REF) plus its hysteresis, the comparator output turns off the main power switch. Then, when the feedback voltage drops below V_REF minus V_HYS , the power switch turns on and the cycle repeats itself. Thus, exceeding the hysteresis voltage determines the switching frequency and overall power-supply performance.

For predictable switching frequency operation within a desired range, the IC's comparator needs a reasonably clean and well-controlled triangular ramp voltage superimposed on the dc feedback voltage, which essentially matches the comparator's hysteresis. Unfortunately, this feedback signal can vary significantly due to the input-supply voltage, output capacitance (C_OUT), C_OUT equivalent series resistance (ESR), inductor value and board layout.

Board layout is critical with any switching supply, and this is perhaps even more important with hysteretic controllers due to high sensitivity to ground and voltage feedback noise that can directly affect switching frequency. Careful adherence to recommended board layout is essential to avoid drastically varying operating frequencies that may result in excessive output-voltage ripple and poor regulation. Additionally, variations in external components, especially C_OUT and its ESR, can cause large shifts in operating frequency. Fortunately, there are some techniques that can circumvent these pitfalls.

Referring to Fig. 1, a typical hysteretic buck controller IC includes a comparator, PMOS driver, one-shot, short-circuit protection and inrush control, and does not require an oscillator to control the switching frequency. The one-shot limits the duty cycle and external component power dissipation during an overcurrent event. Basic operation requires feedback ripple voltage (Fig. 2) to be compared with an internal V_REF (1.242 V) to toggle the high-side PMOS driver whenever the comparator threshold exceeds its 10-mV hysteresis. The conventional hysteretic controller generates this ripple voltage by using the inductor ripple current conducting through C_OUT and some amount of ESR.

Common methods to create ripple voltage in Fig. 2 include:

• Rely on ESR inherent in C_OUT.

• Insert an external ESR in series with C_OUT that is sufficiently larger.

• Insert a known series resistor between C_OUT and inductor.

Determining Switching Frequency

The drawback to using only the ESR of C_OUT is that its value is not well controlled and may vary significantly. Adding a series resistor to C_OUT adds to V_OUT ripple, and inserting it between C_OUT and inductor reduces efficiency. Furthermore, low resistance values (e.g., 100 mΩ) add cost. When using any of the previously mentioned methods, the feed-forward capacitor (C_FF) is recommended to reduce output ripple voltage by providing an ac-coupling path from V_OUT to the feedback pin. This reduces V_OUT ripple required by the controller because feedback resistors R1 and R2 will not divide the output ripple voltage down. Eq. 1 estimates the switching frequency for methods 1, 2 and 3:

where α equals (R1+R2)/R1 and equals 1 when using C_FF, T_D equals the approximate comparator delay of 110 ns and L equals the inductor inductance (henries).

Several factors determine the switching frequency in Eq. 1. For example, C_OUT and its ESR are dominant factors that impact the switching frequency. Changes in C_OUT from part to part, C_OUT trace inductance or additional capacitance at the point of load alter the effective ESR. Calculations based on Eq. 1 are rough estimations, and design engineers must also empirically determine circuit operation with a known set of components, board layout and operating conditions. The problem is that all variations are not easily accounted for during testing. The design challenge is not just multiple variables, but sensitivity to variable tolerances.

Fortunately, a new design approach can improve switching frequency operation and take much of the guesswork and unpredictability out of designing a hysteretic switching regulator. Instead of using the net output ripple voltage created in the final output capacitor, use the source that produces ripple voltage beforehand. In a sense, we can use an “emulated” output ripple voltage by taking the voltage swings from the switch node that produces the same triangular ramp required for operation as shown in Fig. 2. The buck regulator circuit in Fig. 3 uses the LM3485 hysteretic controller and highlights the components in red that emulate V_OUT ripple voltage.

Instead of relying on output ripple voltage at C2 and feeding this back to the comparator, the switch node voltage creates a current source. During the on time of Q1, a constant current of (V_IN - V_OUT)/R_S charges C_FF, and during Q1 off time, C_FF ramps down from the current sink of approximately V_OUT/R_S to produce the required ramp signal based on I = Cdv/dt. Choose capacitor C_FF so its impedance is much less than feedback resistor R1 at the desired switching frequency. Capacitor C_S serves as an ac coupling path and its size is approximately 20 times the value of C_FF. Note that Eq. 2 no longer includes the output ESR or inductor value, and is derived by analyzing the integration components and comparator at a given duty cycle (D) determined by V_IN and V_OUT. Rearranging this equation and solving for R_S in Eq. 3 helps to set the desired frequency using R_S as a dependent variable:

An example using an LM3485 evaluation board will help solidify the design process and operating performance. Measurements in Table 1 were done using an unmodified board (Fig. 3 without C_S or R_S and with C_FF = 100 pF). The V_IN range was chosen to be 8 V to 16 V, V_OUT equals 3.3 V and output load equals 10 Ω. The output load has a negligible effect on the switching frequency, provided the circuit maintains the continuous mode. If I_OUT is less than one-half the inductor ripple current, the discontinuous mode will cause the frequency to reduce as required.