Digital Control Improves Bridgeless PFC Performance

Mar 1, 2011 12:00 PM
Bosheng Sun, System Engineer, Texas Instruments Zhong Ye, System Engineering Manager, Texas Instrume

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Due to the ever-increasing efficiency requirements, many power supply manufacturers are starting to look into bridgeless power factor correction (PFC) topologies. Generally, bridgeless PFCs can reduce conduction losses by reducing the number of semiconductor components in the line-current path. Although the bridgeless PFC is a concept that has been long on promise for many years, the difficulty of implementation and complexity of control prevent it from mainstream acceptance.

With the availability of low-cost, high-performance digital controllers that are specially designed for power supplies, more power supply companies are starting to adopt these new digital controllers for PFC designs. Compared with conventional analog controllers, digital controllers provide many advantages such as programmable configuration, non-linear control, lower part counts, and the most important, the ability of implementing complex functionalities, which are usually difficult for an analog approach.

Most present day digital power controllers, such as TI's Fusion Digital Power^™ controller UCD30xx, provide integrated power control peripherals and a power management core such as digital loop compensators, fast analog-to-digital converters (ADC), high-resolution digital pulse-width modulator (DPWM) with built-in dead-time, low-power consumption micro controllers, etc. They are good for a complex high-performance power supply design such as bridgeless PFCs.

DIGITAL-CONTROLLED BRIDGELESS PFC

Among other bridgeless PFC topologies [1] [2], Fig. 1 is an example of a bridgeless PFC which has been widely adopted by the industry. It has two DC/DC boost circuits [3] [4], one consists of L1, D1 and S1, while the other consists of L2, D2 and S2. The D3 and D4 are slow recovery diodes. The input AC voltage is measured by separately sensing the line and neutral voltages with referencing to internal power ground. By comparing the sensed line and neutral signals, the firmware knows whether this is a positive half-cycle or a negative half-cycle. During a positive half-cycle, the first DC/DC boost circuit, L1-S1-D1, is active and the boost current returns to AC neutral through diode D4. During a negative half-cycle, the second DC/DC boost circuit, L2-S2-D2, is active and the boost current returns to the AC line through diode D3. A digital controller like the UCD3020 is used to control this bridgeless PFC.

A bridgeless PFC essentially consists of two phase-boost circuits, but only one phase is active at any moment. Compared with conventional single-phase PFCs using the same power devices, the switching losses of a bridgeless PFC and a single-phase PFC should be the same. However, a bridgeless PFC current passes only one slow diode (D4 for positive half-cycle and D3 for negative half-cycle) instead of two at any time. Thus, the efficiency improvement relies on the conduction loss difference between one diode and two. Moreover, the bridgeless PFC efficiency can be further improved by turning the inactive switch on fully. For example, during a positive cycle, while S1 is controlled by the PWM signal, S2 can be fully turned on. Since the voltage drop on MOSFET S2 may be lower than diode D4 when the flowing current is below a certain value, the return current partially or totally flows through L1-D1-RL-S2-L2, and then back to the AC source. The conduction loss is decreased and the circuit efficiency can be improved, especially at light-load. Similarly, during a negative cycle, S1 is turned on fully while S2 is switching. The control waveform for S1 and S2 is shown in Fig. 2.

ADAPTIVE BUS VOLTAGE AND SWITCHING FREQUENCY CONTROL

Traditionally, efficiency is specified at full-load for both high-line and low-line. Now, most applications such as computing servers and telecommunications power require that efficiency at 10-50 percent load ranges, along with full-load, should all meet the standard's specifications. In most AC/DC applications, a system has a PFC and a down-stream DC/DC stage, so the efficiency is measured based on the whole system. To improve the whole system efficiency at light-load, one method is to reduce the PFC output voltage and switching frequency. This requires the awareness of load information, which is usually implemented by measuring the output current with extra circuits.

With digital controllers, however, these extra circuits are not necessary. With the same input AC voltage and DC output voltage, the output current is proportional to voltage loop output. So if we know the output of the voltage loop, we can adjust the frequency and output voltage accordingly. With digital controllers, the voltage loop is implemented by firmware, its output is already known, so it is easy to implement this feature, and the cost is much cheaper than using an analog approach.

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