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No-Load Specification Impacts Power-Supply Performance

Mar 1, 2008 12:00 PM
By Steven M. Sandler, Acme Electric, Aerospace Division, and Charles E. Hymowitz, AEi Systems


Be sure to understand the implications of a no-load power-supply specification, which can degrade its closed-loop performance, as well as requiring larger capacitors and imposing increased stress on other components.


When reviewing power-supply specification requirements and supporting design proposals, we often see the minimum load identified as 0 A loading. Although not an issue in and of itself, this no-load requirement significantly degrades the power supply's performance.

One elusive design requirement often called out in power-supply specifications is “no degradation due to bus transients and inrush or outrush current.” Operating a power supply at no load, in most cases, will not cause catastrophic failure; however, overvoltage or stability-related issues, which are caused by the no-load condition, can result in degradation. The extent of the damage is often difficult to quantify.

The no-load requirement generally necessitates a significant degradation in the closed-loop performance (line and load step responses, for example) to maintain the overall power-supply stability in the no-load condition. This performance degradation could require larger capacitors, as well as impose higher stresses on power-supply components. This is generally true, regardless of linear or switching regulation and generally independent of the power-supply topology. Alternatively, preload resistors can be added to the design, which degrades efficiency, increases the power supply's operating temperature and, in turn, reduces its reliability.

A mathematical analysis of the underlying relationship between load current and power-supply performance provides a clearer understanding of no-load operation effects. Several examples, both switching and linear, will show the end effects. You can then make a generalization regarding the specification changes that are necessary to tolerate the no-load requirement.

Normally, power-supply specifications include a “minimum load.” Though, without a specification, you cannot discern the minimum load from the total wattage or other performance aspects. In addition, for supplies with multiple outputs, the minimum load requirements for each voltage are usually different.

Linear Regulator

A linear regulator's seemingly benign topology has a gain of approximately unity, independent of converter loading. You can define a very simplistic low-frequency model as a unity gain stage with an output resistance (for bipolar transistors) defined by Shockley's equation. MOSFETs exhibit similar behavior, although their behavior is less predictable because it depends on their specific manufacturing process. To keep the example simple, we'll use the bipolar transistor shown in Fig. 1.[1]

Shockley's equation tells us that the intrinsic small signal resistance of a silicon junction is related to the current in the junction as:

This small signal resistance (Re) is in series with the physical resistance of the junction. In this simplified case, we are using a TIP33 n-p-n transistor, which has a physical emitter resistance of approximately 0.25 Ω. Thus, we can calculate the pole created by the transistor resistance and the output capacitor. To further simplify our example, we will use a ceramic output capacitor so we can ignore its ESR effects:

To set the zero frequency for stable performance, fix the maximum bandwidth (arbitrarily) at approximately 100 kHz:

Round off the gain to 1.8 to allow use of a standard resistor value. Then, calculate the integrator capacitor for each of the operating currents:


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