Power Electronics



IC-Style Modules Shrink Silicon Footprint for Buck Regulators

Dec 12, 2007 4:12 PM
by David Morrison, Editor, Power Electronics Technology



International Rectifier’s SupIRBuck family of point-of-load regulators (POLs) co-package controllers and MOSFETs in compact QFN packages, reducing the silicon footprint required to implement single-output, synchronous buck converters. According to the company, these 4-A to 14-A rated devices, also provide higher efficiency than existing monolithic, buck regulators. However, direct comparisons are difficult because of the unusually wide input-voltage range (2.5 V to 21 V) of the SupIRBuck devices.

Targeting high-density, high-performance data center and consumer applications, the IR38xx SupIRBuck family comprises nine devices with varying current ratings, and a two-fold choice of switching frequencies and power management features (see Table 1). But despite the different options, a common footprint enables system designers to migrate from one current-rating to another without changing the pc-board layout.

“Because SupIRBuck has a unique, scalable common footprint, designers can simply ‘cut and paste’ their design to significantly reduce risk and enable faster-time-to market,” says Tim Phillips, vice president of International Rectifier’s (IR’s) Enterprise Power Business Unit. “The addition of the SupIRBuck POL family to IR’s industry-leading XPhase and DirectFET multiphase architecture allows us to provide the most efficient and complete power solution for the data center including enterprise servers,” he adds.
Designed for 4 A, 7 A and 12 A of output load current at a 600-kHz switching frequency, the IR38xx operates from an input voltage range of 2.5 V to 21 V, and generates output voltage as low as 0.6 V. Note that the full 2.5-V to 21-V input range is only valid if a second VCC bias voltage is applied. That bias voltage must be in the 4.5-V to 14-V range. However, IR notes that in most of the target applications a 5-V rail already exists and can be used for the bias voltage. But in those cases where only a single input supply rail is available, the input voltage range is restricted to 4.5 V to 14 V.

Common features include pre-bias start up, fixed 600-kHz switching frequency, hiccup current limit, thermal shutdown, and precise output voltage regulation. Optional features include tracking, programmable power good, and a 300-kHz switching frequency to provide an additional 2 A of output current capability. The SupIRBuck family’s thermally enhanced package with a 0.9-mm profile allows mounting on the backside of the motherboard, making the devices ideally suited for space constrained, high-density server applications.

Table 1. Key specs for International Rectifier’s SupIRBuck family of point-of-load regulators


Part Number

VIN Max/Min
(V)

VOUT Max/Min
(V)

Max Current (A)

FSW
(KHz)

Features

IR3812MPBF

21/2.5

12/0.6

4

600

OCP + OTP + TRACKING

IR3822MPBF

21/2.5

12/0.6

4

600

OCP + OTP + PGOOD

IR3822AMPBF

21/2.5

12/0.6

6

300

OCP + OTP + PGOOD

IR3811MPBF

21/2.5

12/0.6

7

600

OCP + OTP + TRACKING

IR3821MPBF

21/2.5

12/0.6

7

600

OCP + OTP + PGOOD

IR3821AMPBF

21/2.5

12/0.6

9

300

OCP + OTP + PGOOD

IR3810MPBF

21/2.5

12/0.6

12

600

OCP + OTP + TRACKING

IR3820MPBF

21/2.5

12/0.6

12

600

OCP + OTP + PGOOD

IR3820AMPBF

21/2.5

12/0.6

14

300

OCP + OTP + PGOOD

Notes: All devices are offered in 5-mm x 6-mm QFN packages. OCP= overcurrent protection, OTP = overtemperature protection, and PGOOD = power good status pin.

The IR38xx SupIRBuck family of point-of-load (POL) voltage regulators integrates IR’s HEXFET MOSFETs and a synchronous buck control IC in a 5-mm by 6-mm power QFN package. Although the company claims this device reduces the silicon footprint by up to 70% compared to discrete solutions, that comparison assumes the use of a 3-mm x 3-mm MLPD-housed controller plus two S0-8 packages MOSFETs. Also, this discrete approach is assumed to occupy 100 mm2 of board area versus 30 mm2 for the SupIRbuck device. The company notes that if a discrete solution employs a dual S08, the reduction in board area is 35%.


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