100-kW DC-DC Converter Employs Resonant -Filter

Jan 1, 2009 12:00 PM
By Dr. Alexander Sokolov, Electrical Engineer, San Diego

Adapted from an ac-output resonant half-bridge inverter circuit, the resonant CLC (capacitor-inductor capacitor) dc-dc converter employs a π-filter loaded by a rectifier.

High-frequency power conversion has established both industry standards and proven good typical design solutions. There are a number of favorite technical solutions for a variety of applications. However, if the required output power exceeds the 100-kW level, the situation is not so clear. No well-known solution operating at a sub-kilowatt power level can successfully scale up to provide 100 kW or more of output power.

The “heart” of each high-power converter is the power inverter, built of semiconductor switches — usually IGBTs. The modern low-power IGBTs are fast and can operate reliably in a hard-switching mode. Otherwise, the high-power IGBTs are significantly slower. Furthermore, they cannot be instantly turned off because of significant parasitic tail current, which is “enemy No. 1” for high-frequency operation. The zero-voltage switching mode eliminates turn-on losses, but very dangerous turn-off stress and associated power losses are still present. Unfortunately, no existing technical solution can eliminate tail-current-related problems completely for regulated dc-output converters. However, it is possible to reduce the harmful tail-current influence to an acceptable level.

One promising solution is suggested here. Its name, first introduced here, is a CLC-inverter, because it is based on a resonant CLC π-filter loaded by a rectifier. The main idea of a CLC-inverter came from a resonant half-bridge inverter, widely used in the electronic ballasts and induction heaters. Fig. 1 shows the simplified schematic of that inverter.

C1 is a dc-blocking capacitor, while C2, L1 and C3 make up a resonant CLC π-filter for the load-impedance matching. This type of inverter must operate in a zero-voltage switching mode; otherwise, energy stored in C2 can destroy power switches. In this circuit, IGBT turn-off switching loss and transitional peak power is dramatically reduced due to low dV/dt across IGBTs after turn-off. Input filter capacitor C2 works as a very efficient snubber, reducing IGBT collector voltage rise speed. For example, the tail current of the typical 300-A, 1200-V rated high-speed IGBT decays near exponentially with 200-ns to 500-ns time constant. Therefore, if a snubber capacitor slows down IGBT voltage rise time to 3 µs, then the total IGBT turn-off energy loss becomes three to five times lower than that without snubber capacitor.

It is very important that the peak-output ac voltage on the load is lower, equal or higher than bus voltage. Therefore, that topology is intrinsically buck-boost. That type of inverter easily generates many kilowatts of clear sine-wave ac-power on the properly matched load. Zero-voltage turn-on and very soft turn-off guarantee both high efficiency and high reliability of IGBT operation at 50 kHz and even higher frequencies.

Despite the fact that this type of inverter was originally designed and widely used for ac-output power, it also can be adapted successfully to provide dc power. The dc-output CLC-inverter can operate either in a half-bridge or full-bridge configuration. Fig. 2 shows a full-bridge CLC-inverter. The CLC π-filter is indirectly composed of snubber capacitors C1 through C4, resonant inductor LRES and a resonant capacitor CRES, connected across the bridge rectifier input. For the sake of simplicity, the output transformer is not shown, although it is always present in the real circuits.

The dc-output voltage on the RLOAD is actually a real output voltage, reflected to primary winding of the power transformer (i.e., divided by transformer turn ratio). A resonant capacitor CRES value is also reflected to the primary side via turn ratio squared.

The output voltage can exceed bus voltage; therefore, this topology is intrinsically buck-boost. However, the best power-conversion efficiency is reached when the reflected output voltage equals bus voltage.

That type of inverter can operate under different control modes (algorithms). The simplest and the most intuitively understandable operation mode is fixed-dead-time variable-frequency (FDT) mode. Under this operation mode, IGBTs are driven in such a way that dead time (i.e., all IGBTs are off) is fixed. Its good real value is 4 µs to 5 µs. Furthermore, its on-time (Q1 and Q4 as well as Q2 and Q3 are driven simultaneously) can vary within established brackets from some maximum value (for example, 21 µs to some minimum value such as 6 µs). Therefore, the switching frequency is not constant; it varies during normal operation from 20 kHz to 50 kHz. The π-filter component values must be properly chosen to guarantee zero-voltage switching and proper impedance matching at the full range of switching frequencies. Fortunately, this is possible but with some restrictions, which is explained further.

Changing switching frequency and keeping dead time constant is a simple way to control output power. The higher the switching frequency, the higher the resonant inductor LRES impedance and the lower the resonant capacitor CRES impedance. This means that by increasing switching frequency, output power is reduced and vice versa. The output voltage, reflected to the primary side, could exceed bus voltage, which is impossible for any PWM topology. This control method is a good alternative to standard fixed-frequency PWM control, which does not work properly in resonant-mode inverters. However, the FDT control is not enough flexible to realize all the advantages of a CLC-inverter.

Want to use this article? Click here for options!
© 2007 Penton Media, Inc.