Optimize Flyback Magnetics to Empower the PD
Mar 23, 2007 2:58 PM
By John Gallagher, Field Applications Engineer, Pulse Engineering, San Diego
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During the second stage of the flyback-topology switching cycle, S1 is opened and S2 is closed. The schematic reduces to that shown in Fig. 3. The primary current is zero because S1 is closed. However, the magnetic field in the transformer cannot change instantaneously and, therefore, looks for a path to dump the stored energy. It does this by reversing the polarity on the secondary winding and sourcing current to the load. The current being delivered to the load ramps down linearly according to Faraday’s law starting from its peak value:
(Eq. 9)
where is the peak secondary-winding current (amps).
The slope of the ramp is:
(Eq. 10)
where N equals NSEC/NPRI.
(Eq. 11)
The changing current (DISEC) reduces the flux density of the core:
(Eq. 12)
Substituting in Eq. 11:
(Eq. 13)
During steady-state operation, the magnitude of the decrease in the magnetic field (DB) during the off time must be equal to the magnitude of the increase during the on time. This leads to the relationship:
(Eq. 14)
It is important to note that although there is no current flowing in the primary winding during the off-time stage, the primary winding does see the reflected voltage of the secondary winding (VSEC):
(Eq. 16)
When S2 is turned off, the energy in the leakage inductance of the primary winding must be dumped. However, because S1 is open, there is no immediate path for current to flow, so the voltage across the leakage inductance rapidly increases until it can push current through the parasitic elements of the capacitance of the transformer primary and the output capacitance of the MOSFET. This leakage spike along with the induced voltage on the primary winding creates a voltage stress S1:
VS1 = VIN + VLK + VSEC 3 (NPRI / NSEC), (Eq. 17)
And (Eq. 18)
where VLK is the voltage across the leakage inductance (volts), CPRI is the capacitance across the primary winding (Farads) andis the drain-source capacitance of the MOSFET (Farads).
Eq. 17 implies that the turns ratio should be small enough to prevent excessive stress on S1. In addition to stressing S1, which often requires extra snubbing circuitry for protection, the leakage inductance delays the transfer of power from the primary to the secondary. Therefore, minimizing leakage inductance is a key element to flyback-transformer design.
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