Power Electronics



Optimize Flyback Magnetics to Empower the PD

Mar 23, 2007 2:58 PM
By John Gallagher, Field Applications Engineer, Pulse Engineering, San Diego


Overview of Flyback Topology


A basic understanding of the continuous flyback topology is necessary to derive the equations for the PoE power transformer design. A simplified schematic of the flyback topology is shown in Fig. 1. The primary switch S1 is a MOSFET, and the secondary switch S2 can either be a diode or a second MOSFET operated as a high-efficiency synchronous rectifier. Regardless of the exact implementation, the flyback topology’s switching cycle has two distinct stages.

On-Time Stage

The first stage is the on-time stage, in which S1 is closed and the input is connected to the primary winding (NPRI) of the transformer for a period of time defined by tON.
(Eq. 1)

During this stage, S2 is opened (representing either the turning off of the MOSFET or the reverse biasing of the diode), and the schematic reduces to the circuit in Fig. 2. In this schematic, the transformer’s primary-winding leakage inductance is shown as a separate inductor, and the resistance of S1 is shown as a resistive element, along with their respective voltage drops. When S1 is closed, current flows through the primary winding, but the change in current is limited by the primary winding’s inductance according to Faraday’s law:
(Eq. 2)

(Eq. 3)
where DIPRI is the change in primary-winding current (amps), VPRI is the voltage across the primary winding (volts), tON is the duration of the S1 closure and LPRI is the primary-winding inductance (microhenrys).
The changing primary current creates a magnetic field in the core of the transformer, which in turn induces a voltage across the secondary winding.
(Eq. 4)

(Eq. 5)
However, because the S2 is open, no current can flow and the energy created in the primary winding is stored in the magnetic field of the core. The energy stored is equal to:
(Eq. 6)
And, by definition, power is simply energy divided by time: (Eq. 7)
It should be noted that, even though no current is flowing in the secondary, voltage is present (VSEC) and does create stress across S2, which is an important factor in determining the turns ratio (NPRI / NSEC):

(Eq. 8)
where VS2 is the voltage across S2 (volts), VIN is the input voltage (volts) and VOUT is the output voltage (volts). Eq. 8 implies that the turns ratio must be large enough to prevent excessive stress across S2. It also should be noted that, during this time, the primary leakage inductance is storing energy, but that this energy represents a loss in the circuit, as there is no mechanism to transfer it to the secondary. During the on-time stage, the output current is supplied by the output capacitor, because no current is flowing through the transformer’s secondary winding.


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