The switching element, Q, in a SEPIC converter must have a voltage rating high enough to handle the maximum input voltage plus the output voltage — not to mention any leakageinductanceinduced spike that is inevitably present. You can approximate the required voltage rating of the MOSFET using Eq. 14.
View all the equations here.
View all the calculated values here.
Where V_{DS} = the required draintosource voltage rating of the MOSFET.
The other parameters governing the selection of the MOSFET include the RMS current given by Eq. 15, as well as the total gate charge and ON resistance (R_{DS(ON)}) to minimize the switching losses.
The sum of conduction loss and switching loss (PQ_Vinmin) in the MOSFET at V_{INMIN} is given by Eq. 16:
and the total losses (PQ_V_{INMAX}) in the MOSFET at V_{INMAX} are calculated using Eq. 17:
DIODE SELECTION
The MOSFET package heat dissipation capability should be greater than the maximum of either of the two PQ equations (Eq. 16 or Eq. 17), where R_{DS}Q = ON resistance, Q_{GD} = Gate Drain charge, and I_{GATE} = MOSFET gate driver sourcing/sinking current. A device such as the Si7850DP from Vishay meets the needs to serve as a switch that can withstand up to 60 V.
The waveforms in Fig. 5 show the MOSFET drain voltage and gate voltage at a 40V input voltage and 1A output current. This shows that the drain voltage is the sum of the input voltage and the output voltage.
When the primary switch is OFF, the diode conducts the energy stored in the coupled inductors. During this time, the output capacitors also are charged. The main parameters to be considered while selecting the diode include reverse blocking voltage, forward current, reverse recovery time (t_{rr}) and forward voltage drop. Schottky rectifiers have a lower forward voltage drop than typical PN devices; however, their reverse blocking voltage is less.
The peak reverse voltage (V_{D}) that the device will be subjected to is equal to the maximum input voltage plus the output voltage. Thus, the diode reverse voltage rating should be greater than the value calculated using Eq. 18. Because all current to the output capacitor and load must flow through the diode, the average forward diode current (ID_{AVG}) is equal to the steadystate load current.
CURRENT LIMITING AND CURRENT SENSING
The average current rating is given by Eq. 19:
Furthermore, the average current rating of diode D should be greater than value calculated using Eq. 19. The 8TQ080SPBF diode from Vishay is a good match for this design.
The currentsense voltage obtained from the external currentsense resistor is compared with the 300mV threshold currentlimit comparator of the MAX15004. This provides the overcurrent protection to the switch and avoids the saturation problems in the transformer or inductors.
PROGRAMMABLE SLOPE COMPENSATION
To select the currentsense resistor value, divide the threshold value by the peak inductor current (IL_{PK}) at the desired current limit point — typically 120% of IL_{PK} calculated by Eq. 20. In this design, a 190mV currentlimit threshold is used to improve the efficiency and to reduce the power rating of the resistor.
This groundreferenced resistor must be a low inductance type and have a rated power level to meet the requirement. For this application, a parallel combination of two 30mωΩ, 1W IRC LRCLR2010LF01R030F power resistors is used. Current spikes caused by the trace leakage inductance and the reverse recovery of the diode (D) could trip the currentsense latch and prematurely turn off the switch. This unwanted spike can be suppressed by adding a small RC filter for effective leadingedge blanking. For this application, a 100ns external lowpass filter is added. To reduce the currentlimit threshold to 190 mV, a 40.1kΩ resistor is added between the Reg5 and CS pins of the controller.
Slope compensation is required for openloop stability in a current mode system with 50% or greater duty cycles. Insufficient slope compensation results in subharmonic oscillations at the output at half the switching frequency. Slope compensation can be achieved by adding a compensating ramp to the sensed inductor current ramp at the PWM comparator input. The exact amount of the compensating ramp voltage is determined by the down slope of the inductor current. Experience shows that exact magnitude of the ramp should be half of down slope of inductor current. In the MAX15005A, designers have the flexibility of programming compensating slope with a simple capacitor.
The first step in implementing slope compensation is to calculate the inductor down slope amps per second using Eq. 21:
LOOP COMPENSATION
Then, calculate the capacitance value using Eq. 22.
For this application, 180 pF is appropriate. Waveforms in Fig. 6 show the currentsense voltage and slope compensating ramp at 2.5V input and an output current of 0.875 A.
The MAX15005A has an internal, highperformance (100 dB, 1.6MHz unitygain bandwidth) operational amplifier that serves as the error amplifier. This allows users to compensate externally for desired crossover frequency for different inductor and capacitor values. The control transfer function from output to currentsense voltage is defined by Eq. 23, Eq. 24 and Eq. 25.
(See Eq. 23, above)
and
(See Eq. 24, above)
D_{1}= (1D)
(25)
Load pole and ESR zero calculations are done using Eq. 26.
As with boost and flyback converters, one RHP zero is present in SEPIC converters due to energy transfer from the output capacitor when SW is ON, and its frequency can be calculated using Eq. 27.
Due to this RHP zero, the system crossover frequency (F_{CV}) must be reduced well before F_{RHZ}, (i.e., to approximately onesixth of F_{RHZ}). This can be done by compensation components RF, CF and CCF (R11, C19 and C20, respectively, in Fig. 2 of Part 1) This network has one zero at:
one pole at the origin, and another high frequency pole at:
Once desired crossover frequency (F_{CV}) is decided, RF is selected to program the error amplifier gain to achieve desired F_{CV}. To select the value, calculate the gain of the power stage at the desired crossover frequency using the previous control transfer function and Eq. 28. Calculate the C_{F} and C_{CF} values using Eq. 29 and Eq. 30, respectively.
where FCV is the smaller of F_{RHZ}/6 or F_{LOAD}/6.
CALCULATED VALUES
The waveforms in Fig. 7 and Fig. 8 show the SEPIC supply's load transient response and the line transient response, respectively. The output voltage ripples less than 3% of the output voltage with a 50% load step. This converter recovers smoothly after the line transients.
During coldcrank starts in automotive applications, the battery voltage can go as low as 2.5 V. This SEPIC design can supply regulated power to the load even with this low battery voltage. In such a case, the waveforms in Fig. 8 show the coldcrank condition of 12.6 V to 2.5 V, with a lowoutput voltage ripple and an output current of 0.875 A. The graph in Fig. 9 shows the efficiency for different loading conditions at different input voltage levels.
In the final design, here are the actual calculated values for a converter in the example shown. Referenced equation numbers are included for each equation.
C17 = 100 pF
REFERENCES :
R10 =56 kΩ
For more SEPIC converter examples, visit www.maximic.com.

Erickson, R.W. and Maksimovic, D. “Fundamentals of Power Electronics,” 2nd Edition, 2004.

MAX15004/5 Datasheet, “4.5V to 40V Input Automotive Flyback/Boost/SEPIC PowerSupply Controllers,” www.maximic.com.

“AN1051: SEPIC Equations and Component Ratings,” www.maximic.com.