Today, system designers are compelled to design systems optimized for minimum power, particularly with FPGAs. To minimize FPGA power consumption, we should look at its total power consumption, which is primarily:

  • Inrush/Power-up current
  • Configuration
  • Static current
  • Dynamic current

Now, we should look in detail at each power consumption factor:

Inrush/Power-up current—When an FPGA powers up, it needs to establish internal biases and complete reset sequence.  It causes a current surge that may generate a spike as high as several amperes for as long as a few hundred microseconds, resulting in an In-rush power. This power component is de-emphasized by FPGA vendors, but can play a major role in impacting power supply design and hence impacting the overall system cost and real-estate requirements. Power-up current does not impact total power to a large extent in applications where system does not go through power-cycle frequently. However, in applications where a frequent power-cycle is needed, power-up current itself is a power-hog.

Apart from total power consumption, instantaneous power consumption is the challenge imposed by power-up current. Power-up current is several times higher than the operating current of FPGA that needs supply specifically designed to deliver current needed at power-up. Additionally, SRAM-based FPGAs need power sequencing, and not following the sequencing can cause power-up current to be much higher than what is mentioned in device datasheets. This further adds the need of a power sequencing circuit and hence additional cost and real-estate requirements.

Considering all these factors, it is of utmost importance to understand the power-up current specification of the FPGA before selecting it for any system. Flash-based FPGAs have a significant advantage for low-power design with no in-rush current spike, simplified POR (Power ON Reset) sequencing, and lower overall power supply cost.

Configuration Current—SRAM-based FPGAs do not retain configuration when power is lost; they need to reload configuration data from external non-volatile memory at power-up. This consumes significant current for several hundred msec and can result in shorter battery life for systems with frequent power cycling. Flash-based FPGAs retain configuration on power down and therefore do not use any configuration current.

Static Current—Static current consumption is also called quiescent current. It is the result of leakage in the transistors. Static power consumption becomes very important for total system power consumption as it is the constant power that will be consumed by the device as long as it is powered (if low-power modes are not available). Static power is not dependent on the switching frequency and hence needs to be examined carefully in applications where the system runs on a low operating frequency, resulting in lower dynamic power. In such designs, static power will dominate the overall power consumption numbers. 

SRAM-based FPGAs are composed of SRAM cells with six transistors per cell, with multiple leakage paths, resulting in substantial leakage current per cell and high static current for the device. In comparison, Flash-based FPGAs consist of just one transistor with 1000x lower leakage current per cell resulting in ultra-low static power.

Dynamic Current—Dynamic FPGA power consumption is:

P = CV2F                       (1)


P = Dynamic power in watts

V= Operating voltage in volts

F= Frequency in kHz

C= Load capacitance in µF

Higher operating frequency results in higher dynamic power consumption. All FPGA vendors provide estimators to estimate the dynamic power based on the resource utilization and switching frequency. It is important to do power estimation before selecting a device for the system.

All power components that are discussed contribute toward the total power. When a device powers up, power-up current contributes toward the total system power consumption that can be of the order of several hundred mA or several Ampere in higher density FPGAs. While the system is powered on, static and dynamic power take over the power budget.

From system perspective, thermal management also becomes a challenge when average power consumption is high. In such a scenario, if thermal management is not accounted for, it can cause thermal run-away.