High Efficiency at Low Currents: A Necessity For Notebooks

Oct 17, 2007 2:04 PM
By Alan Elbanhawy, Director, Advanced Power System Center, Fairchild Semiconductor International, San Jose, Calif.

Power-supply designers routinely tackle new dc-dc converter design tasks with the goal of achieving the highest efficiency possible. Clearly, this task is a very complex one. Once the topology has been selected based on the specifics of the application, a designer must go through a very rigorous process of component selection. This process includes selection of the PWM controller, power MOSFETs and gate drivers as well as the input and output filter inductors and capacitors.

Usually, the one overruling goal of the designer is to achieve the highest power conversion efficiency at the maximum load current, while worrying much less about the converter’s efficiency at low current levels.

Depending on the application, a power designer may find this goal sufficient if the application requires the load current to be in the range of 70% to 100% of the full load. Such a design clearly will render some very satisfactory performance results since the efficiency curve of a well-designed dc-dc converter tends not to vary much in this range. So, the user will — more or less — get the same efficiency within approximately ±1.5%.

On the other hand, in a very demanding application such as the core converter in a notebook computer, the situation is very different. Here, the load histogram shows long periods of steady-state current in the lower percentiles of the load range interrupted by shorter periods of medium to high currents up to the full load.

Nonetheless, even in notebook applications it seems that dc-dc converter designers still place an overwhelming emphasis on the full-load-current efficiency. These designers focus to a much lesser degree on optimizing efficiencies at currents on the low end of the range.

If we examine this situation closely, one can see that lower efficiencies at low currents will directly negatively impact the battery life. That’s because, for a very large percentage of the time, the notebook computer operates at these low current levels.

Some very simple and effective techniques have been employed to partially remedy this situation by allowing the PWM controller to operate in pulse-skipping or constant-on time modes at low currents and move to full PWM control at higher currents. This results in improved efficiencies up to a certain limit, but much more can be done to improve overall efficiency.

Innovative ideas can be implemented to achieve a “flat” power conversion efficiency curve, where the dc-dc converter delivers high efficiency over the entire current range. Here, the enabling technology consists primarily of improved or “intelligent” gate-driver schemes. Several companies have already received patents for such schemes, which — when implemented — should produce robust designs that directly improve the notebook’s battery life without adding any extra burden on the cooling system.

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© 2007 Penton Media, Inc.