Electronic systems are often subject to the power limitations imposed by their power supplies and batteries, and the maximum power available from those sources often must be minimized to reduce the system's cost, size and weight. Exceeding the maximum power limit can lead to shortened battery life or power-supply failure. Therefore, it is important that the power demand remain below a specified threshold.

One way to limit the amount of power supplied to a load is to monitor load current with a current-sense amplifier. The effective power is then proportional to the sensed current, provided the source voltage is known and constant. This technique is adequate for many applications, but others require true power monitoring. For those, you must monitor power consumed by the load directly. Examples include battery-driven applications, in which the cell voltages change with respect to time.

In addition to detecting power-limit thresholds, power monitoring can arbitrate the amount of power allocated to selected subsystems, according to the total power required at that moment by the system. By allowing the use of smaller power supplies and batteries for a given application, this approach further reduces the size, cost and weight of the battery and the system.

DC power monitoring is conceptually straightforward, simply multiply the monitored dc load current by the measured dc supply voltage. Actual implementations are more complex, however, because the accurate multiplication of analog signals is not trivial. One effective method of multiplication is accomplished by converting measured current information into the pulse-width of a PWM waveform, and converting measured voltage into the PWM waveform's height.

After low-pass filtering the PWM signal, the remaining dc level is proportional to power consumed by the load. The Fourier coefficients for a repetitive pulse sequence of duty cycle D and unit height are:

where n is the coefficient number. Low-pass filtering removes all ac components of the series, leaving only the dc term:

To complete this analysis, incorporate the measured source voltage as the amplitude of the PWM waveform, and relate the PWM duty cycle to load current. The dc output of the low-pass filter can then be expressed as:

where cv is a voltage-attenuation constant whose presence will be made obvious in subsequent application circuits, IMAX is the maximum load current, D has been replaced by ILOAD/IMAX, and K is a scaling constant that relates measured source voltage and load current to the low-pass filtered output voltage. Note that source voltage is measured rather than load voltage. Source and load voltage are roughly equal, but a source-voltage measurement provides a more accurate representation of power consumed by the load and associated current-sense device.

In a basic implementation of the power-monitor circuit (Fig. 1), current passes from source to load through the current-sense resistor R1. In conjunction with R1, U1 provides an output voltage equal to R1*50, which is five times the actual load current. Assuming a maximum sense voltage of 100 mV for U1 (and with R2 not present), this configuration implies a maximum sense current of 1 A and a corresponding U1 output voltage of 5 V. Incorporating R2 reduces the overall maximum output voltage to 3 V.

U2 and U3 create a supply-independent triangle waveform with limits close to 0 V and 3 V. U2 regulates the Vcc of U3 to 3 V, and U3 with its associated components form a well-known triangle-wave generator, whose frequency of oscillation is given by:

The theoretical threshold limits of this waveform are Vth- = αVCC2 and Vth+ = (1-α)VCC2, where VCC2 is the triangle-waveform generator's 3-V supply, and a is given by:

Actual limits will differ slightly because of parasitic resistances. The triangle waveform generated by U3 is applied to the negative input of open-drain comparator U4, and the output from U1, now scaled to a maximum voltage of 3 V, is applied to the positive input of U4. U4's output is a PWM signal whose pulse width is proportional to current, and the signal's load-voltage portion is incorporated into the PWM circuit through the R8/R9 voltage divider, which set the cv values described previously. Because U4 has an open-drain output, the divider voltage sets the height of the PWM waveform. The values of these resistors were chosen to scale the load voltage by 0.1 while reducing the loading effect of R10. Finally, the PWM signal is low-pass filtered with R10 and C6, thereby creating a dc signal proportional to the consumed load power.

For an enhanced implementation of the basic power monitor (Fig. 2), the current-sense device (U1) has been replaced with a MAX4374F. Besides a current-sense amplifier, this device includes two comparators and an internal reference, which allow the generation of flags based on certain power conditions. This circuit can be used for power-based circuit-breaker applications in which a series FET must be shut off during overpower conditions.

The second comparator lets you release the triggered over power condition when power levels have returned to acceptable levels (set by R16 and R17). An additional op amp (U5) and associated resistors have been added to buffer the analog output voltage generated by the high-impedance low-pass filter.

As shown in Fig. 3, the circuits of Figs. 1 and 2 closely track the ideal relationship of PMEASURED = PACTUAL. Further improvements in x-intercept accuracy can be achieved by decreasing a, thereby forcing the triangle wave to approach its rails more closely. Take care to avoid saturating the triangle wave. Increased gain can be achieved by adjusting any of the resistors along the current-sense signal path.

Note that precision 1% resistors have been used to minimize the gain error. That measure is especially important for resistors along the signal path. In addition to gain error, other errors arise from U4's comparator offset and from aberrations in the triangle waveform (nonlinearity of the waveform slopes, waveform limits not exactly at the rails, and rounded waveform shapes at the maxima and minima).

Finally, remember there are other methods for performing the multiplication required for computing load power, including degenerated differential pairs (the Gilbert cell), log/anti-log amplification, and digital conversion and multiplication. In contrast, however, the circuits presented here offer relative simplicity, low cost and low power.

### Acknowledgments

The author wishes to thank Miles Bekgran for his extensive lab work in support of this article.