DSP Control Improves Inverter Performance and Density

Feb 1, 2003 12:00 PM
By Liviu Mihalache, and Mihai Chis, Power Conversion Technologies Inc., Harmony, Pa.

Multifunction DSP provides the necessary inverter controls.

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Low-cost, high-performance, high-density dc-ac inverters are key elements in UPS, fuel cell, solar, and wind array systems. A cost-effective solution to inverter design is based on advances in digital signal processor (DSP). Powerful 16-bit, fixed point DSPs incorporate all the necessary circuitry required by power electronics applications such as: PWM channels, A/D converters, CAN interface, internal and/or external memory, serial ports, event timer, and encoder interface.

How can you effectively use a 16-bit fixed point DSP controller to reduce the size of a dc-ac inverter, increase efficiency, and improve the total harmonic distortion (THD) — especially in the presence of highly nonlinear loads? Generally, the size of the dc-ac inverter is determined by its output LC filter. You can make this smaller by using higher switching frequency; however, this increases overall losses and requires bigger heatsinks with more cooling. The proposed method demonstrates that the output filter size can be reduced even when the switching frequency is low. Traditionally, adding a current loop with the effect of dumping the LC filter leads to a lower THD, however distortion is still present in the output voltage, especially if the switching frequency is well below 20 KHz. Adding a current loop also makes the system more difficult to analyze and generally requires an accurate isolated current transducer and either a large, bulky, expensive inductor or the use of a high switching frequency to remove the switching ripple.

Fig. 1 is the topology of a typical IGBT-based, single-phase inverter. Notice the addition of a second filter in the form of a trap filter, whose role we'll explain later. Standard unipolar PWM voltage modulation is used because it offers the advantage of effectively doubling the switching frequency of the inverter voltage.

Fig. 2, on page 47, depicts the inverter control technique used in this approach. It does not involve an inductor or capacitor current loop, meaning the main output filter will introduce very high impedance around its resonant frequency. The immediate effect is that any harmonic current due to a nonlinear load around the filter resonant frequency will determine a significant voltage harmonic component in the output voltage spectrum. If the main filter resonant frequency is moved further from the lower main harmonics of the inverter (3^rd, 5^th, 7^th, 9^th, etc), it can significantly reduce the unwanted influence of output filter impedance.

For a switching frequency of 6 kHz, the main output filter frequency can be set between 3.5 KHz to 4.5 KHz; thus the output filter becomes small, despite the relatively low switching frequency. The resonant controllers shown in Fig. 2 now have the task of removing each individual low frequency harmonic (up to the 29^th in this case), since the main filter will provide no attenuation in this range. The resonant controller tuned to the fundamental has the task of accurately tracking the sinusoidal voltage reference with minimum phase and amplitude errors even in presence of highly disturbing loads. All other resonant controllers act as very narrow band stop filters providing a software trap for unwanted harmonic components. Each resonant controller tuned to any harmonic component has exactly the function as a standard hardware LC trap filter tuned to the desired harmonic to be eliminated.

The second filter depicted in Fig. 1, on page 44, is necessary because the main filter formed by L1 and C1 has a high cutoff frequency and does not provide enough attenuation at twice the switching frequency where the main harmonics are located. The size of this second filter is small because it has to be tuned to twice the switching frequency — that is, 12 kHz. The overall size of the output filter is reduced significantly because this approach takes advantage of the computational power of the DSP. It essentially shifts much of the filtering effort, especially in the low frequency range, toward the control software and only the very high frequencies are removed by the hardware output LC filter.

The block diagram in Fig. 2 shows a low-pass filter and a phase and amplitude recovery block to prevent higher frequency components from entering the controller. This is necessary because around the resonant frequency, the phase shift becomes 180°, which causes control loop instabilities. The phase and amplitude recovery block uses a simple method: the exact phase and amplitude change after passing through a standard first order digital low-pass filter is first calculated and then compensated.

For the practical realization of the resonant controllers we know that PI stationary regulators of ac signals have nonzero, steady-state errors in amplitude and phase, due to the limitation in controller gain at the fundamental frequency. A general method for controlling ac signals was recently developed where we establish a direct relationship between a dc type compensator and the equivalent ac compensator having the same frequency response in the desired bandwidth. The equation for this method is:

Where:

K_P = Proportional gain constant

K_I = Integral gains constant

If a standard PI controller as given by Equation (2) is used, then the expression for the ac controller can be written as:

Where:

ω_k = kω

k = 1,3…29 (odd harmonics)

Implementation of Equation (3) is a concern when the proportional term is nonzero. It's generally necessary to account for a certain delay time, particularly at low switching frequencies; the expression for the equivalent ac integrating controller then becomes:

where:

ф = Time delay compensation

Since Equation (4) represents a lossless network, you must add a small dumping term; you then implement the resultant transfer function can as a biquad filter. This approach is sensitive to coefficient errors, unless we use a more expensive floating point DSP. It's possible to implement the original transfer function of Equation (4) on a low-cost 16-bit fixed-point DSP — without the dumping factor. A physical interpretation for the resonant controller in Equation (3) recognizes the current and output voltage of an ideal LC filter, as depicted in Fig. 3, can be written as

Where the elements of the filter satisfy the relationship

From Equations (5) and (6) we can conclude the ac pure integrating controller can now be simply written as:

Thus, the task of realizing the resonant controller given by Equation (4) reduces to that of determining the output voltage and current of a fictitious LC resonant circuit with

and tuned to the desired frequency (ω_k = kω, k = 1,3‥29) where the input is the error between the reference and feedback. The following discrete state space equations apply for the LC filter depicted in figure 3:

V_in(k) = V_ref(k) - V_feedback (k) (11)

From a mathematical point of view, the system given by Equations (8) to (11) is a second order normal IIR filter having minimal noise gain and minimal coefficient round-off errors; thus, it is much better suited for a 16-bit, fixed-point implementation. The second order IIR filter with a normal architecture involves more calculation than the biquad filter because all the elements of the matrices involved are now nonzero, yet the added complexity is justified by reducing the errors due to coefficients round-off, making it possible to implement on a cheap 16 bit fixed-point DSP. A further improvement in the IIR architecture is still possible by imposing the additional constraints for the elements of matrices to achieve a section optimal filter that has a minimal round-off error variance. We can achieve this using a non-singular transformation matrix; however, practical experiments show little improvement when compared with the IIR filter having normal architecture.

Software control is intended to remove up to the 29^th harmonic from the output voltage spectrum. This is a challenge if the switching frequency is only 6 kHz because the 29^th harmonic (in the case of a 60 Hz inverter) is located at 1.74 kHz. The delays produced by the computational time, PWM power stage and the A/D converter become more and more significant as the harmonic order increases. You can see this from the expression of the resonant controller in Equation (7). At lower frequencies, the expression of the resonant controller is mainly given by the fictitious resonant current; as the harmonic order increases, the fictitious resonant voltage term becomes more significant. To reduce the errors caused by the various delays, the output voltage is sampled at the higher speed of 24 kHz. The resonant controllers are also implemented at 24 kHz, since their precision is critical in obtaining accurate tracking of the fundamental and elimination of low-order harmonics. The PWM pulses are updated twice per carrier (double-edged unsymmetrical PWM), so the duty cycles are modified in each half of the switching period.

Although no current loop is involved, the output impedance is near zero at selected frequencies where the resonant controllers are tuned. Let's look at the mathematical expression of the output impedance:

Where k = 1….29

T = Switching frequency

K_PWM = Constant that depends on the dc-link voltage, modulation index and feedback voltage scale

The expression for the output impedance emphasizes the need to correctly tune the resonant controllers to the fundamental frequency harmonics. Imperfect implementation of the resonant controllers determines an increase in the output impedance and leads to poor output regulation and increased total harmonic distortion in the presence of nonlinear loads.

To verify the proposed DSP-controlled inverter method, a 15kVA IGBT-based prototype was built, and the control was implemented with an ADMC401 DSP. Table 1 summarizes parameters of the prototype inverter.

Experimental results confirm the inverter can reject the distortion produced by nonlinear loads that are used as the front end of a switching power supply. If the inverter has a current loop, it often causes a trip when the peak current exceeds the maximum limit of the transducer and processor's A/D converter. This phenomenon is common when many computers and data acquisition systems are simultaneously in use, each having its own switching power supply. This causes the peak current to be large — even if rms value is below the inverter's capability. This isn't a problem, since no current loop is involved and the maximum allowable current through the IGBT's gives the only limitation.

The test setup consisted of a full bridge diode rectifier with two 6800µF electrolytic capacitors connected in parallel. The resistance was varied between 1.8Ω and 4Ω. Figs. 4 and 5 depict the output voltage and the output current and the characteristics of the nonlinear load. Fig. 6 shows the harmonic spectrum in this nonlinear load case and the total harmonic distortion is kept to a very low value of 2.7%. If the load is linear, the output voltage exhibits extremely low distortion, about 0.4% as seen from Fig. 7, on page 50, and Fig. 8.

Table 2 summarizes the losses of each component of the inverter. Efficiency is more than 95% at full linear load, and switching losses are 20% of overall losses due to a moderate switching frequency of only 6 kHz.

References

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