Analog ICs Support High-Speed Memory Systems

May 1, 2002 12:00 PM
By Sam Davis, Editor, Power Electronics Technology

Special power sources are necessary for double data rate (DDR) memory, a new form of random access memory (RAM) intended to keep pace with faster microprocessors. DDR memories access data on the positive- and negative-going transitions of computer clock cycle, whereas conventional RAM accesses data on a single signal transition of the clock. Currently, DDR standards are PC1600 and PC2100, referring to total memory bandwidth. For most applications, DDR memories should outperform conventional RAM by about 10%.

DDR terminal regulators are analog ICs that support DDR memories by minimizing timing skew and power dissipation. The voltages involved in this termination process are V_DDQ, V_TT, and V_REF. According to the JEDEC specification: V_TT = 0.5 (V_DDQ), V_REF is a buffered reference voltage that also tracks 0.5(V_DDQ), and V_TT must track V_REF with <40mV offset regardless of variations in voltage, temperature, and noise.

DDR memory uses series stub termination logic (SSTL) to improve data transmission integrity over the bus. This termination configuration prevents data error from signal reflections while transmitting at the high frequencies associated with DDR memory. It involves the use of the termination regulator and termination resistors.

National Semiconductor's LP2995 regulator (Fig. 1) provides a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications for DDR memory termination. It contains a high-speed op amp that provides excellent response to load transients. The output stage prevents shot-through, while delivering up to a 3A peak for DDR termination. It can sink and source current at the V_TT output, regulating the voltage to 0.5(V_DDQ).

Fairchild Semiconductor's family of DDR termination regulators includes a low dropout regulator with bidirectional output capable of sourcing and sinking 1A (Fig. 2, on page 66). The FAN1654 can handle transient loads up to 1.5A, with peak currents meeting the loads of most DDR bus termination applications. Its V_TT outputs include force and sense pins to maintain accurate voltage levels on the bus, assuring the highest possible data bus bandwidth. With V_TT maintained equal to V_DDQ/2 ±40mV, the FAN1654's output voltage regulation is guaranteed to meet the JEDEC specification for DDR memory interface levels. Additionally, a buffered V_REF output capable of ±5mA is provided for SSTL-2 interface devices. Another important feature includes a shutdown control for turning off the device's outputs, which reduces power consumption. Also, V_TT output is protected against overload and short circuit conditions by on-chip thermal limiting.

The MAX1917 for DDR memory provides a more complete power management solution. This Maxim IC contains a synchronous buck controller and an amplifier to generate 0.5V_DDQ voltage for V_TT and V_REF (Fig. 3, on page 66). These two voltages maintain within 1% of 0.5V_DDQ. The controller operates in synchronous rectification mode to ensure balanced current sourcing arid sinking capability of up to 25A. With a shutdown current of less than 5µA, it's a good choice for low-power notebook applications as well as servers and desktop computers. An all NFET design optimizes efficiency. You can also use this controller for generating V_DDQ and as a general-purpose, step-down controller with variable switching frequency as high as 1 MHz with few additional components.

Intersil Corp. has introduced the Endura^™ ISL6530 and ISL6531 dual PWM regulator ICs designed to power DDR memory. These power controllers are 5V input devices and provide three regulated voltage sources: V_DDQ, V_REF, and V_TT. They use a cascaded approach to create V_TT. This cascaded architecture provides increased benefits compared to using independent controllers for V_DDQ and V_TT. You only need to rate the V_DDQ converter in the cascaded topology for half the current compared to an independent architecture. Also, because of the lower input voltage for the V_TT converter, switching losses are lower — leading to higher efficiency. This provides protection features, such as V_TT overvoltage protection (OVP) and overcurrent protection (OCP).

International Rectifier's IRU3038 is a synchronous PWM controller IC for DDR memory termination. It integrates an error amplifier into the PWM controller package to make implementation of the power management circuit for V_TT easy and capable of a voltage tracking accuracy of less than 1.5%. It integrates a high- and low-side driver, eliminating external drive circuitry. In a synchronous buck converter, it provides current levels of up to 10A using the 1RF7457 and 1RF7460 power MOSFETs. For current levels up to 3A, you can use the 1RF7313 dual MOSFET. The complementary and cost-effective IRU3037 PWM controller, combined with the 1RF7457 and 1RF7460 MOSFETs, powers the V_DDQ supply voltage. The IRU3038 can operate with a single 5V or 12V supply, and you can program it to operate between 200 kHz and 400 kHz using an external resistor. The device features undervoltage lockout for V_CC and V_C supplies, an externally programmable soft-start function and an output undervoltage detection that latches the device off if there's a shorted output.

Linear Technology's version of the termination regulator is the LTC3831. A power supply built using this regulator can sink or source up to 15A of load current and operates with 90% efficiency. It generates the termination voltage (V_TT) equal to one-half of the system's reference voltage (V_REF or V_DDQ) without requiring external resistor dividers. This means it can support a V_TT range from 4V down to 1.1V. Moreover, the LTC3831 accurately tracks this reference voltage. It's a voltage mode synchronous step-down dc-dc controller. Since it drives external MOSFETs, it can satisfy load current requirements with high efficiency. This is important because load currents for DDR memory can range from 2A to 15A. It includes a fixed-frequency PWM oscillator for low output ripple operation. You can externally adjust or synchronize the 200 kHz free-running clock frequency with an external signal from 100 kHz to 500 kHz.

Texas Instruments' contribution to bus termination applications is the TPS54672 (Fig. 4). It integrates all the required active components, including a high-performance voltage error amplifier. Also included is an undervoltage lockout circuit to prevent start-up until the input voltage reaches 3V, a slow-start control to limit inrush currents, and a status output to indicate valid operating conditions. It tracks an externally applied reference voltage with a 6% to 90% VIN output tracking range. On-chip is a 30mΩ, 6A continuous, 12A peak MOSFET. You can fix the PWM at 350 kHz or adjust it from 280 kHz to 700 kHz.

Two low-cost ICs and a MOSFET make up the 5A tracking bus termination voltage regulator from Micrel shown in Fig. 5, on page 67. This regulator uses an AD8517 op amp as an error amplifier to control the high-side, open-loop LDO (MIC29502BU) while sourcing current and the low-side MOSFET when the LDO sinks current. The R1/R2 resistive divider develops the reference for the error amplifier, which is one-half the input voltage. This forces the V_TT output to track half the 2.5V V_DDQ.

The new SC1480 DDR termination regulator from Semtech Corp. targets mobile computers and data communications systems. It features a typical power conversion efficiency of 94%. It's input supply range is 2V to 25V, allowing it to interface directly with standard battery configurations and a/c adapters. It's two output voltages are l.25V for active termination (V_TT) and 1.25V at 3mA for a buffered reference (V_REF). Besides its normal mode of operation, the SC1480 also offers power-reduced standby and shutdown modes. Typical quiescent current is 700µA in normal mode. By turning off the V_TT output but leaving the V_REF output on, the typical quiescent current reduces to 125µA in standby mode. In the shutdown mode, it typically draws 10µA.

National Semiconductor, Sunnyvale, Calif.
CIRCLE 340 on Reader Service Card

Fairchild Semiconductor, San Jose, Calif.
CIRCLE 341 on Reader Service Card

Maxim Integrated Products, Sunnyvale, Calif.
CIRCLE 342 on Reader Service Card

Intersil Corp., Melbourne, Fla.
CIRCLE 343 on Reader Service Card

International Rectifier, El Segundo, Calif.
CIRCLE 344 on Reader Service Card

Linear Technology Corp., Milpitas, Calif.
CIRCLE 345 on Reader Service Card

Micrel Inc., San Jose, Calif.
CIRCLE 346 on Reader Service Card

Texas Instruments, Dallas
CIRCLE 347 on Reader Service Card

Semtech, Newbury Park, Calif.
CIRCLE 348 on Reader Service Card

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