Power efficiency is a fundamental characteristic of any switch-mode power supply (SMPS), and its measure generally dictates the quality of the conversion device. High numbers bestow bragging rights upon the successful engineer, while low numbers usually denote the need for modification or redesign.

Maximum efficiency is a prime consideration for all SMPSs, but even more so for those found in portable devices, where battery life must be prolonged to offer consumers extended run time while using their favorite gadgets and toys. High efficiency is also a must for those designs that require improved thermal management, or where the cost of providing power is of concern.

To achieve the maximum conversion efficiency in an SMPS design, the engineer must understand the elementary power-loss mechanisms inherent in these converters, and what can be done to mitigate their effects. Additionally, familiarity with common SMPS IC features that facilitate higher efficiency enable the engineer to make better choices when confronted with switch-mode converter design.

In this two-part discussion, the basic factors affecting SMPS efficiency are explained and guidance is provided on how to start a new design. Introductory material and switching component power losses are covered in this first installment.

Efficiency Expectations

Energy losses are an intrinsic part of energy conversion systems. The non-idealities of the natural world prevent us from attaining that ultimate reward of 100% conversion efficiency. However, well-designed power supplies can achieve efficiencies that are quite remarkable, generally approaching percentages in the mid to high 90s.

For curious souls, benchmark efficiencies can be obtained by examining the typical operating characteristics found in datasheets available from power-supply IC manufacturers. For example, the stepdown converter circuit in Fig. 1 achieves up to 97% efficiency for certain output configurations, and yields high efficiency for very light loads.

How are such high efficiency numbers realized? Paying careful attention to the fundamental losses common to all SMPSs is a great start. These losses are found largely in the switching components (MOSFETs and diodes) and, to a lesser extent, in the inductors and capacitors of the generic SMPS circuit. Depending on the IC, special features can be selected that will combat efficiency losses, such as control architecture options and component integration. For example, the circuit in Fig. 1 employs several methods to combat intrinsic losses including synchronous rectification, integrated low-resistance MOSFETs, low quiescent-current consumption, and a pulse-skipping control architecture, the benefits of which will be discussed as this article unfolds.

Brief Stepdown SMPS Overview

Although the losses that will be discussed are applicable to all basic SMPS topologies, the following text is explained with reference to the generic stepdown or buck converter circuit in Fig. 2. The figure also highlights some of the circuit’s switching waveforms that will be referred to in calculations presented later.

The stepdown converter reduces a higher dc-input voltage to a lower dc-output voltage. In doing so, a MOSFET is switched on and off at a constant modulation frequency (fS) by a pulse-width modulated (PWM) square wave signal. In a nutshell, when the MOSFET is on, the input supply charges the inductor and capacitor and delivers power to the load. During this time, the magnitude of the inductor current ramps up as it flows through Loop 1, as shown in Fig. 2.

When the MOSFET turns off, the input supply is disconnected from the output, and the inductor and output capacitor support the load. The magnitude of the inductor current ramps down as it flows through the diode, following the direction indicated in Loop 2. The fraction of the switching period in which the MOSFET is on is defined by the duty cycle (D) of the PWM signal. D divides each switching period (tS) into [D x tS] and [(1-D) x tS] intervals, which are associated with MOSFET conduction (Loop 1) and diode conduction (Loop 2), respectively.

All SMPS topologies use this division of the switching period to achieve output-voltage conversion. For the stepdown converter, the larger duty cycle is, the more energy is driven to the load, and average output voltage increases. Conversely, as duty cycle decreases, average output voltage decreases.

Due to this relationship, the conversion ratios for the stepdown SMPS are:

It is important to note that the longer that any SMPS remains in a particular interval, the greater the relative losses are that coincide with that interval. For the stepdown converter, a low D signifies greater relative losses around Loop 2 since that loop dominates the switching period.