Unlike power switching FETs, RF FETs are designed to work best in the linear region of operation to maximize power gain and minimize distortion, whereas power switching devices are optimized for lowest RDS(ON) and gate charge[1,2,3,17,18,19,20]. Another significant difference between power switching and RF FETs is the power dissipation capability of RF devices is significantly higher than that of power switching devices for equivalent terminal characteristics to accommodate the higher power losses in the linear region.

We will focus on RF characterization in the frequency range from 200 MHz through 2.5 GHz, the results of which can be used to design a pulsed power RF amplifer.

RF Characterization

Prior to being able to compare various RF FETs with each other they need to be properly characterized, which can  accomplished by measuring the S-parameters of the FET while regarding it as a 2-port network under controlled bias conditions.

Fig. 1. Reference plane design for the EPC2012 eGaN FET using a 30 mil thick Rogers 4350 substrate.

A test fixture was designed for the EPC2012 to connect the RF signals to the FET and to provide the necessary S-parameter measurement reference planes from which the dataset would be valid. The test fixture design used a 30 mil thick Rogers 4350 substrate [21], chosen for its low losses at higher frequencies. This allowed the design to be suitable for frequencies as high as 12 GHz. Fig. 1 shows the reference plane design and highlights the outline of the EPC2012 device. The transmission lines to the device Gate and Drain were designed as microstrip transmission lines with 50 Ω characteristic impedance.

Fig. 2.  Photograph of the EPC9903 small signal RF test fixture for the EPC2012 eGaN FET (with the heat sink mounted shown in right image).

The test fixture was also equipped with a negative temperature co-efficient thermistor (NTC) placed in close proximity to the source pad of the eGaN FET to provide an indication of the temperature of the copper in that area without affecting the RF performance. The EPC9903 test fixture in Fig. 2 shows the right side image showing the top mounted heat-sink. The EPC FET has a lower thermal resistance [3] from junction to the top side of the device, compared to the bottom side (soldered), and hence mounting the heat-sink to the back side of the device has a high impact on the power dissipation capability of the device.

Due to thermal limitations of the test fixture and the EPC2012 device, testing of the eGaN FET was pulsed with a low duty cycle with the average power dissipation kept below 0.7 W without the heat-sink, and 5 W with the heat-sink and forced air cooling. The heat-sink used was 15 mm x 15 mm x 14.5 mm high, supplied by Advanced Thermal Solutions [14] with thermal interface material from Wakefield [7].