The Accelerator Design Platform includes hardware and software integrated to achieve a design flow that requires no coding to configure the motor control algorithms and proven designs for analog and power stages. The design platform includes a motion control mixed signal chip set, an FPGA-based configurable digital signal processor using parallel processing and customizable peripherals, high-voltage ICs for gate drive and current sensing analog functions, and IGBT-based power inverter stage.

In addition, it’s capable of executing an advanced field oriented control (FOC) and PWM algorithm loop in less than 4 us, while a high performance programmable DSP-based control loop takes as much as 15 us to 20 us. Peripherals can be customized to fit specific application requirements, such as an interface for an encoder or resolver, sine PWM, or space vector PWM.

For more information, visit www.irf.com.

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