High Efficiency at Low Currents: A Necessity For Notebooks

Oct 17, 2007 2:04 PM
By Alan Elbanhawy, Director, Advanced Power System Center, Fairchild Semiconductor International, San Jose, Calif.

The above-mentioned innovative ideas must balance the demands of the circuit over the entire current range. Such a feat is not easily achieved because the demand for high efficiency at full load requires smaller MOSFET which can only be achieved using larger die sizes with larger gate capacitances, C_GS and C_GD.

These capacitances play a major role in determining the dynamic losses; the larger the value of these capacitances, the larger the dynamic losses. The loss mechanisms at low currents then become dominated by the dynamic losses, which are directly dependent on the switching frequency. So, concerns over dynamic losses at light loads make the decision to move to higher switching frequencies a very difficult one.

The dominance of the dynamic losses is due to the selection of an small enough to generate low conduction losses at the maximum current. That minimization of makes the conduction losses at low currents almost negligible since conduction losses are approximately proportional to I².

In the face of these technical challenges, I believe that the move to higher efficiency over the entire load range in notebook computers has largely stalled. Why? Because designing for higher efficiency over such a wide load range has a negative impact on the cost of the overall bill of materials. Even as notebook computers continue to provide greater performance (including more efficient power conversion), notebook pricing continues to fall. Going forward, these are issues that component suppliers, computer manufacturers and even consumers will need to grapple with as energy efficiency continues to become a more pressing issue for everyone.

Want to use this article? Click here for options!
© 2007 Penton Media, Inc.